Semiconductor device manufacturing: process – Making device array and selectively interconnecting – With electrical circuit layout
Reexamination Certificate
2002-02-28
2003-11-18
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
With electrical circuit layout
C430S005000
Reexamination Certificate
active
06649452
ABSTRACT:
FIELD OF THE INVENTION
The field of the invention relates generally to semiconductor devices, and more specifically, to reticles used to form semiconductor devices.
RELATED ART
As semiconductor device dimensions shrink, semiconductor device feature density increases. Thus, physical dimensions of features and spaces between the features decrease. Since the spaces between the features are smaller, if the decreased features' physical dimensions are not well controlled adjacent features may merge. If the features are conductive, they will short together. Alternatively, the features can be smaller than desired and thus not perform as required. For example, a feature can be too small to provide enough current to another feature. Thus, in order for the semiconductor device to function properly the physical dimensions of the features must be well controlled.
In order to measure the control of the physical dimensions, the width of a feature, typically the smallest feature, is monitored through the manufacturing process. This measurement is termed critical dimension (CD).
The CD of a feature can be altered during reticle manufacturing, which impacts the resulting CD on the semiconductor wafer and often decreases manufacturing yield, circuit performance or device reliability. In other words, the CD of a feature during reticle manufacturing can have an adverse effect on the cost and/or performance of the semiconductor device. Thus, a need exists to control the CD of features during the reticle manufacturing process.
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Garza Cesar
Lucas Kevin D.
Wilkinson William L.
Hill Daniel D.
Le Thao P
Motorola Inc.
Vo Kim-Marie
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