Method for manufacturing a liquid crystal display device

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Reexamination Certificate

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C430S313000, C430S317000, C430S319000, C430S396000

Reexamination Certificate

active

06410211

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a liquid crystal display device (LCD) and more specifically, to a method for manufacturing an LCD including at least two stacked thin layers in which the upper thin film smoothly and completely covers the lower thin film and in which a photo-resist layer is formed in a single masking step to have a thick portion and a thin portion.
2. Description of the Background Art
A thin film type liquid crystal display device includes an upper panel, a lower panel and a liquid crystal material inserted therebetween. At the outer side of the two joined panels, polarizing plates are attached. The upper panel includes an inner side having a color filter and a common electrode and an outer side having a polarizing plate. As seen in
FIGS. 1
,
2
,
3
a
and
3
b
, the lower panel includes an outer side having another polarizing plate and an inner side having a plurality of gate bus lines
10
and a gate pad
10
a
, a plurality of data bus lines
20
and data pad
20
a
, a TFT switching element C and a pixel electrode
30
.
The structure of the lower panel is explained hereafter in detail, referring to
FIG. 2
which shows a plan view of the conventional LCD and
FIG. 3
a
which shows a cross-sectional view of the conventional LCD along the line A—A of FIG.
2
.
A plurality of the gate bus lines
10
perpendicularly cross a plurality of the data bus lines
20
. The TFT switching element C, which includes a gate electrode
11
which is derived from the gate bus line
10
, a source electrode
21
which is derived from the data bus line
20
and a drain electrode
22
which faces the source electrode
21
, is disposed at the intersection portion of the gate bus line
10
and the data bus line
20
. A pixel electrode
30
connected to the drain electrode
22
and an output electrode of the TFT C are formed in the area surrounded by the gate line
10
and the source line
20
.
The process of manufacturing the lower panel of the conventional LCD is explained hereinafter.
A first metal layer is formed by depositing aluminum or aluminum alloy on a transparent substrate
1
. A plurality of gate bus lines
10
, a gate pad
10
a
and a gate electrode
11
derived from the gate bus line
10
are formed by etching the first metal layer.
A gate insulating layer
12
which has a good adhesive property with an amorphous silicon and a high insulating property, such as SiN
x
or SiO
x
, is formed on the substrate
1
which includes the gate bus line
10
, the gate electrode
11
and the gate pad
10
a.
On the gate insulating layer
12
, an amorphous silicon and an n
+
type impurity doped amorphous silicon are sequentially deposited and patterned to form an intrinsic semiconductor layer
15
and a doped semiconductor layer
16
(or an ohmic contact layer).
A second metal layer is formed on the entire surface of the substrate, and may be formed of aluminum or aluminum alloy. The second metal layer is patterned to form a plurality of data bus lines
20
which perpendicularly cross the gate bus lines
10
, a data pad
20
a
which is disposed at the each end of the data bus line
10
, a source electrode
21
which is derived from the data bus line
20
and a drain electrode
22
which faces the source electrode
21
. As a result, a TFT switching element including the gate electrode
11
, the semiconductor layers
15
and
16
, the source electrode
21
and the drain electrode
22
is completed.
On the substrate including the gate bus line
10
, the data bus line
20
, the gate pad
10
a
, the data pad
20
a
and the switching element, a passivation layer
23
is formed using SiN
x
, SiO
x
or BCB(benzocyclobutene). A contact hole is formed by removing some portion of the passivation layer
23
which covers the drain electrode
22
to expose some portions of the drain electrode
22
.
An ITO(Indium Tin Oxide) layer is deposited on the passivation layer
23
via a sputtering method. The pixel electrode
30
is formed by patterning the ITO layer. The pixel electrode
30
is connected to the drain electrode
22
through the contact hole.
The method of manufacturing the conventional LCD includes many processes for forming thin layers which are stacked on each other, and the thin layers are deposited and patterned via masking processes. The LCD according to this conventional method has a stacked structure as shown in
FIG. 3
a
in which the gate bus line
10
and the data bus line
20
, the gate electrode
11
and the data electrode
21
, the pixel electrode
30
and the drain electrode
22
cross each other.
In this stacked structure, the cross-sectional shape of the lower layer is a main factor for determining the deposited state of the upper layer. If the cross sectional shape of the lower layer has an inverse tapered shape or a shoulder, the upper layer deposited thereon has discontinued or unstable portions.
For example, as shown in
FIG. 3
b
, the cross-sectional shape, taken along the line B—B of
FIG. 2
, of the drain electrode
22
determines how the passivation layer
23
and the pixel electrode
30
will be deposited thereon. When the cross-sectional shape of the drain electrode
22
has an inverse tapered shape, the passivation layer
23
has a shoulder
24
or crack formed therein. At these portions having the shoulder
24
or the cracks, the pixel electrode
30
when deposited has a greatly reduced thickness or is even discontinued at this portion. Furthermore, when the pixel electrode is patterned by using an etchant on the cracked passivation layer, the drain electrode can be damaged by the etchant as it spreads or percolates through the cracks.
SUMMARY OF THE INVENTION
To overcome the problems described above, the preferred embodiments of the present invention provide a method of forming stacked thin layers in which intersecting portions of the stacked thin layers have a smoothly tapered cross-sectional shape to prevent formation of cracked or discontinued portions. In addition, preferred embodiments of the present invention provide a method of manufacturing an LCD in which a photo-resist layer having different thicknesses is formed in a single masking step.
According to one preferred embodiment of the present invention, a method of manufacturing a semiconductor device includes the steps of providing a substrate, forming a layer on the substrate, coating a photo-resist on the layer, and exposing and developing the photo-resist using only a single mask such that the photo-resist has a pattern including a thick portion and thin portion. The single mask used in this preferred embodiment preferably includes a plurality of lines and spaces between the lines, wherein a distance between the lines of the mask is less than a resolution of a system used for exposing the photo-resist.
In another preferred embodiment of the present invention, a method of manufacturing a semiconductor device includes the steps of providing a substrate, forming a layer on the substrate, coating a photo-resist on the layer, and performing a single masking step to develop the photo-resist such that the photo-resist has a thick portion and a thin portion. In this preferred embodiment, the single mask step is done using a mask that includes a plurality of lines and spaces between the lines, wherein a distance between the lines of the mask is less than a resolution of a system used for exposing the photo-resist.


REFERENCES:
patent: 4231811 (1980-11-01), Somekh et al.
patent: 5985766 (1999-11-01), Wu et al.
patent: 6043000 (2000-03-01), Park et al.
patent: 1100518 (1989-04-01), None
patent: 5003164 (1993-08-01), None
patent: 5343535 (1993-12-01), None
patent: 7-028074 (1995-01-01), None

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