Method for manufacturing a DRAM using selective epitaxial growth

Details Method for manufacturing a DRAM using selective epitaxial growth Method for manufacturing a DRAM using selective epitaxial growth

1990-03-15

1991-09-03

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 89, 437 90, 437193, 437919, 148DIG26, H01L 2172, H01L 2120

Patent

active

050454943

ABSTRACT:
A method for manufacturing a semiconductor device includes forming contact holes in insulating layers to expose an impurity doped region of a semiconductor substrate. An epitaxial layer is then grown in the contact hole. A polycrystalline silicon layer is formed over the top to provide the lower electrode of a capacitor. Accordingly, the polycrystalline layer is separated from the impurity doped region thereby preventing current leakage.

REFERENCES:
patent: 4578142 (1986-03-01), Corboy, Jr. et al.
patent: 4700457 (1987-10-01), Matsukawa
Wolf, Silicon Processing for the VLSI Era, vol. 1, pp. 155-156, 1986.

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