Method for manufacturing a device having a high aspect ratio...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S627000, C438S629000, C257SE21575

Reexamination Certificate

active

07863181

ABSTRACT:
Method for manufacturing a device having a conductive via includes the following steps. A dielectric material layer including a through hole is formed on a substrate. A seed metallic layer is formed on the dielectric material layer and in the through hole. A metallic layer is formed on the seed metallic layer, and is filled in the through hole. The metallic layer located over the seed metallic layer and outside the through hole is etched by a spin etching process, whereby the metallic layer located in the through hole is formed to a lower portion. An upper portion is formed on the lower portion, and a metallic trace is formed on the seed metallic layer, wherein the upper and lower portions is formed to a conductive via, and the conductive via and the metallic trace expose a part of the seed metallic layer. The exposed seed metallic layer is etched.

REFERENCES:
patent: 4661204 (1987-04-01), Mathur et al.
patent: 5330629 (1994-07-01), Cunningham et al.
patent: 7414314 (2008-08-01), Abe
patent: 2007/0069347 (2007-03-01), Lin et al.
patent: 2008/0081458 (2008-04-01), Lin et al.

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