Method for manufacturing a copper interconnection with an...

Details Method for manufacturing a copper interconnection with an... Method for manufacturing a copper interconnection with an...

2000-12-21

2002-08-20

Chaudhuri, Olik (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S653000, C438S687000

Reexamination Certificate

active

06436817

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor device; and, more particularly, to a method for manufacturing a copper interconnection provided with double diffusion barrier layers which are formed before and after a formation of the copper interconnection respectively, thereby preventing the diffusion of copper atoms effectively.
DESCRIPTION OF THE PRIOR ART
With a high integration of a semiconductor device, a copper interconnection is being applied to the device due to its low electrical resistance property. For employing the copper interconnection in the semiconductor device, a damascene process is used because dry-etching process cannot be applied directly to deposit a copper interconnection layer in a damascene pattern.
Referring to
FIGS. 1A
to
1
D, there are provided cross sectional views setting forth a conventional method for manufacturing the copper interconnection by using a damascene process.
The manufacturing steps begin with a preparation of active matrix
110
provided with a substrate
110
, an insulating layer
112
and a contact region
111
. The insulating layer
112
, is formed on top of the substrate
110
and then patterned into a predetermined configuration by using a damascene process, thereby obtaining a shallow opening
116
for a metal interconnection and a deep opening for a contact. Thereafter, a diffusion barrier layer
114
is formed on entire surface including the openings
116
,
118
and the insulating layer
112
for preventing a penetration of copper atoms into the insulating layer
112
. The diffusion barrier layer is made of a material such as TiSiN, Ta, TaN, WSiN, WN or the like.
In a next step as shown in
FIG. 1B
, a first copper layer
120
is formed on the diffusion barrier layer
114
by using a method such as a physical vapor deposition (PVD) technique at a room temperature.
In a subsequent step as shown in
FIG. 1C
, a second copper layer is formed on the first copper layer
120
for reflowing the copper atoms into the openings
116
,
118
by using the PVD technique at a high temperature.
Finally, a copper layer is polished back to a top surface of the insulating layer
112
, thereby obtaining a copper interconnection
124
being remained within the openings
116
,
118
and a diffusion barrier
114
A as shown in FIG. ID. Here, polishing back of the copper layers
120
,
122
and the diffusion barrier layer
114
is accomplished by a chemical mechanical polishing (CMP) technique.
In the conventional method for manufacturing the copper interconnection, a single diffusion barrier layer, e.g., TiSiN, Ta, WSiN, WN or the like, is employed. However, in case that there are defects in the single diffusion barrier layer, the copper atoms may diffuse through these defects that a characteristic of the semiconductor device is deteriorated eventually.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a method for manufacturing a copper interconnection provided with a double barrier layer, thereby preventing the diffusion of copper atoms effectively.
In accordance with one aspect of the present invention, there is provided a method for manufacturing a copper interconnection, the method comprising the steps of: a) preparing an active matrix provided with a substrate, an insulating layer and an opening formed with a predetermined shape through the insulating layer; b) forming a first aluminum oxide layer on surfaces of the opening and the insulating layer; c) forming a first conductive barrier layer on the first aluminum oxide layer; d) forming a copper layer into the opening and on the first conductive barrier layer; e) polishing back the copper layer to a top surface of the insulating layer, thereby obtaining a copper interconnection within the opening and a first double diffusion barrier layer provided with the first aluminum oxide layer and the first conductive barrier layer; and f) forming a second diffusion barrier layer on the copper interconnection and the insulating layer.


REFERENCES:
patent: 5736192 (1998-04-01), Okamoto
patent: 5783483 (1998-07-01), Gardner
patent: 6188135 (2001-02-01), Chan et al.
patent: 6268291 (2001-07-01), Andricacos et al.
patent: 11-204524 (1999-07-01), None

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