Method for managing free physical pages that reduces trashing to

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring

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Details

711173, 711209, G06F 1208

Patent

active

058976604

ABSTRACT:
The present invention overcomes the drawbacks of conventional operating system implementations of virtual to physical memory address mapping by providing a method for free physical page management and translation of virtual addresses to physical addresses that increases the effectiveness of the cache memory by reducing the thrashing caused by unfavorable mapping of virtual to physical addresses.

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patent: 5479627 (1995-12-01), Khalidi et al.
patent: 5561786 (1996-10-01), Morse
patent: 5577243 (1996-11-01), Sherwood er al.

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