Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1996-02-28
1999-10-26
Le, Dieu-Minh T.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 54, 714719, G06F 1100
Patent
active
059745703
ABSTRACT:
A method of managing a memory area, in a data processing system, comprising providing a managing information memory area for items of in use, test done, and temporary fault of pages in a page table for managing a memory unit. In accordance with such a scheme, when a page is allocated to a program, an operation test is conducted on a page not tested, the time when the operation test has been conducted is recorded, and an operation test is again conducted on a page for which a predetermined time has passed since the last test performed thereat. Also, the values of output signals of main and sub memory modules of the data processing system are compared while the data processing system is operating, and if a difference is found, that is, non-coincidence is detected, this difference is detected as a fault by the test.
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Kawaguchi Atsuo
Motoda Hiroshi
Hitachi , Ltd.
Le Dieu-Minh T.
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