Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
1999-04-19
2001-11-27
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S807000
Reexamination Certificate
active
06324661
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of managing integrity defects of data written into a rewritable memory of an electronic component.
A particularly advantageous application of the invention lies in the field of providing security for electronic transactions performed between an electronic component on a card, referred to as “an electronic memory”, and a terminal connected to an issuer managed by an operator: a bank card undertaking or some other operator.
Under such circumstances, the electronic component of the card performs operations, e.g. erasing and/or writing, capable of altering the data written in the rewritable memory, and it exchanges information concerning the operations it has performed, either directly with the terminal in an off-line mode of operation, or with the issuer via the terminal in an on-line mode of operation. Which of those two modes of operation is selected depends on pre-established criteria, for example if the amount involved in the transaction is less than a certain threshold, then communication takes place off-line, whereas above the threshold the transaction must be performed on-line, with authorization from the issuer being necessary under such circumstances.
BACKGROUND OF THE INVENTION
As a general rule, the electronic memory cards used for performing electronic transactions, e.g. of the credit/debit type, have EEPROM or flash EPROM memories giving the two advantages of being non-volatile and of being electrically erasable, and thus of being rewritable. However they can be reprogrammed a limited number of times only and they take a long time to be programmed.
In certain applications, it can happen that these memories are corrupted for one or other of the following reasons:
too large a number of rewrite operations, wearing out certain memory cells and giving rise to faulty operation of the electronic memory;
programming performed for a very short time only, giving rise to insufficient charge in the memory cells; and/or
accidental interruption of the electrical power supply during programming, giving rise to the same effect, or indeed to earlier values being erased without new values being programmed.
This third risk is particularly important in applications such as electronic memory cards where said memory is on board an object whose power supply is external and from which it can be separated at all times.
Nevertheless, it can be seen that these causes of corruption giving rise to integrity defects in the data written in the rewritable memory are not equivalent. A memory that is misfunctioning because of cell wear is final and irreversible, whereas writing errors due particularly to the card being taken out of the terminal too soon or to the electronic component losing its power supply voltage are isolated accidents that do not involve the general operation of the system.
SUMMARY OF THE INVENTION
Thus the technical problem to be solved by the present invention is to provide a method of managing integrity defects of data written in a rewritable memory of an electronic component, said electronic component being suitable for performing operations capable of modifying at least some of said data and of interchanging information relating to said operations, either directly off-line with a terminal or on-line with an issuer via said terminal, which method makes it possible to distinguish between integrity defects due to faulty operation of the electronic memory making the component and the electronic card irremediably unusable and integrity defects associated with incidents that interfered with the electrical power supply to the electronic component without the general operation of the electronic memory card being involved.
REFERENCES:
patent: 4837744 (1989-06-01), Marquot
patent: 6101620 (2000-08-01), Ranganathan
patent: 0 724 238 A1 (1996-07-01), None
patent: 0 727 785 A1 (1996-08-01), None
patent: 2 473 755 (1981-07-01), None
Franchi Olivier
Gambin Jean-Marc
Gerbault Eric
Chung Phung M.
Frishauf, Holtz Goodman, Langer & Chick, P.C.
Schlumberger Systemes
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