Method for managing bad memory blocks in a...

Details Method for managing bad memory blocks in a... Method for managing bad memory blocks in a...

2008-02-19

2009-10-13

Tabone, Jr., John J (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

C714S711000, C714S718000

Reexamination Certificate

active

07603593

ABSTRACT:
A method for managing bad memory blocks of a nonvolatile-memory device, in which the available memory blocks are divided into a first set, formed by addressable memory blocks that are to be used by a user, and a second set, formed by spare memory blocks that are to replace bad addressable memory blocks, and in which the bad addressable memory blocks are re-mapped into corresponding spare memory blocks. The re-mapping of the bad addressable memory blocks envisages: seeking bad spare memory blocks; storing the logic address of each bad spare memory block in a re-directing vector in a position corresponding to that of the bad spare memory block in the respective set; seeking bad addressable memory blocks; and storing the logic address of each bad addressable memory block in a free position in the re-directing vector.

REFERENCES:
patent: 4827452 (1989-05-01), Toyama et al.
patent: 5781717 (1998-07-01), Wu et al.
patent: 6567950 (2003-05-01), Bertin et al.
patent: 000424889 (1991-05-01), None
patent: 2 136 992 (1984-09-01), None
patent: WO 92/20068 (1992-11-01), None
European Search Report from European Patent Application No. 04425435.7, filed Jun. 14, 2004.

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