Method for managing and controlling the low power modes for...

Details Method for managing and controlling the low power modes for... Method for managing and controlling the low power modes for...

2006-07-31

2010-06-15

Lee, Thomas (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

Reexamination Certificate

active

07739528

ABSTRACT:
A state machine and an external interface, including its associated input-outputs (IOs), are always powered on and used to manage the chip power modes and power mode transitions. The chip power modes are defined as RUN, HIBERNATE, POWERDOWN, with many more possible with this invention. For example, once the device is in HIBERNATE or POWERDOWN modes, the power supplies to the IC are either reduced, or completely disconnected except for this controller state machine. This invention's state machine and control mechanism, in response to some external “wake up event”, will bring the chip to RUN mode by managing the state of the external power supplies through its control interface. The implementation achieves small die size and extreme low power consumption.

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The I2C-bus and how to use it (including specifications), 1995, Philip Semiconductor pp. 1-24.

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