Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-02-22
2002-04-16
Fahmy, Wael (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S640000, C438S641000
Reexamination Certificate
active
06372637
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates, in general, to contact etch processes and, more particularly, to sloped contact etch processes.
BACKGROUND OF THE INVENTION
Dynamic random access memory (DRAM) semiconductor devices and static random access memory (SRAM) semiconductor devices typically include an insulating layer of a dielectric material to electrically separate one conductive layer from another. Often, the two conductive layers are connected by means of a hole, commonly known as a “contact” or “via,” in the insulating layer. Sometimes the via must have a sloped or faceted profile to provide proper step coverage of appropriate thickness of the conductive layer. Vertical contact profiles often result in unacceptable step coverage and excessively sloped profiles provide good step coverage but result in highly enlarged vias. Enlarged vias may cause electrical shorting between or within conductive layers and may also reduce the density of the circuit features by limiting the proximity of the devices. Thus, providing an adequate contact slope is critical to achieving acceptable contact step coverage.
U.S. Pat. No. 5,320,981 to Blalock describes a process for forming a sloped via. In this process, a photoresist mask is used to define an etch area on a dielectric layer. The dielectric layer is etched either isotropically or anisotropically to expose an underlying conductive layer. After the dielectric layer has been etched, the photoresist mask is removed and a second etch is performed. This second etch is a plasma etch and is conducted with a material, such as argon, krypton or xenon, so that as close as possible to a purely physical, as opposed to chemical, erosion takes place. The second etch forms a facet in the side walls of the via and redeposits the eroded dielectric material onto the opposite side wall.
However, when a photoresist material is used during etching of a via, particles of the photoresist material become deposited in the resulting via and on the conductive material. These particles of photoresist material affect the subsequent step coverage and the resulting conductivity of the semiconductor device. Further, plasma etching of a material is not a selective process and in the case of facet etching, portions of the semiconductor device other than the portion being facet etched may be damaged. Thus, a need still exists in the art for a process for forming a semiconductor devices having a gradual slope contact.
SUMMARY OF THE INVENTION
The present invention meets the current needs in the art by providing a method for forming semiconductor devices having gradual slope contacts. The present invention also provides a variety of semiconductor devices having gradual slope contacts.
One aspect of the present invention is directed to a method for making a semiconductor device precursor. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; etching the layer of hard mask material to expose a portion of the first layer; forming facets on the layer of hard mask material; and forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material.
Another aspect of the present invention is directed to a method for forming a semiconductor device precursor. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the layer of hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer; forming facets on the layer of hard mask material; and forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material.
Still another aspect of the present invention is directed to a method for forming a semiconductor device precursor. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer and to form opposing sidewalls in at least a portion of the first layer; bombarding the hard mask material with an ion source to form facets; depositing a portion of the material removed from the layer of hard mask material on opposite sidewalls of the first layer; forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material.
Yet another aspect of the present invention is directed to a method for forming a semiconductor device. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; etching the layer of hard mask material to expose at least a portion of the first layer and to provide the hard mask material with facets; forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material; and forming a metal interconnect in the via, the metal interconnect contacting at least a portion of the layer of conductive material.
A further aspect of the present invention is directed to a semiconductor device precursor having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; etching the layer of hard mask material to expose a portion of the first layer; forming gradual slope contact on the layer of hard mask material; and forming a via in the first layer, the via extending through the first layer to expose at least a portion of the layer of conductive material.
Another aspect of the present invention is directed to a semiconductor device precursor having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the layer of hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer; forming gradual slope contact on the layer of hard mask material; and forming a via in the first layer, the via extending through the first layer to expose at least a portion of the layer of conductive material.
Still another aspect of the present invention is directed to a semiconductor device precursor having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer and to form opposing sidewalls in at least a portion of the first layer; bombarding the hard mask material with an ion source to form a gradual slope contact; depositing a portion of the material removed from the layer of hard mask material on opposite sidewalls of the first layer; forming a via in the first layer, the via extending through the first layer to expose at least a portion of the layer of conductive material.
Yet another aspect of the present invention is directed to a semiconductor device having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first
Brewster William M.
Fahmy Wael
Killworth, Gottman Hagan & Schaeff, L.L.P.
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