Method for making multilayer wiring structure

Details Method for making multilayer wiring structure Method for making multilayer wiring structure

1997-03-07

2000-03-28

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438624, 438634, 438637, 438638, 438666, 438667, H01L 214763

Patent

active

060431458

ABSTRACT:
In a method for making a multilayer wiring structure, a second insulating film having an etching rate slower than a first insulating film is provided on the first insulating film covering a wiring pattern; an opening is formed in the second insulating film in a portion corresponding to a connecting hole to be formed afterwards; a third insulating film having an etching rate faster than the second insulating film is provided on the opening and the second insulating film; a groove is formed, so as to expose the opening, in the third insulating film in a portion where an upper-layer wiring pattern is formed, and the connecting hole reaching the wiring pattern is formed; and a connecting plug is formed by packing a conductive material in the connecting hole, and the upper-layer wiring pattern is formed by packing a conductive material in the groove.

REFERENCES:
patent: 5126006 (1992-06-01), Cronin et al.
patent: 5354711 (1994-10-01), Heitzmann et al.
patent: 5741626 (1998-04-01), Jain et al.
patent: 5858877 (1999-01-01), Dennison et al.

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