Method for making folded extended window field effect transistor

Details Method for making folded extended window field effect transistor Method for making folded extended window field effect transistor

1987-12-04

1989-07-04

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156656, 156657, 1566591, 156662, 437 43, 437 56, H01L 21306, B44C 122, C03C 1500, C23F 102

Patent

active

048447765

ABSTRACT:
A gate electrode having an insulating top layer as well as insulating sidewall spacers permits the source and drain regions to be electrically contacted through windows directly above the source and drain regions formed in a window pad layer. The window pad layer may also be used as a sublevel interconnect.

REFERENCES:
patent: 4324038 (1982-04-01), Chang
patent: 4453306 (1984-06-01), Lynch
Japanese Journal of Applied Physics, 21, pp. 34-38, Symposium on VLSI Technology, Sep. 1-3, 1982.
IBM Technical Disclosure Bulletin, 26, pp. 4303-4307, Jan., 1984.

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