Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Patent
1996-08-19
1997-04-29
Niebling, John
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
438647, 438649, 438934, H01L 2128
Patent
active
056248717
ABSTRACT:
A method for producing an interconnect on a semiconductor device has silicon containing conductive surfaces and dielectric surfaces. The process includes forming separate regions of a blanket first refractory metal silicide on the silicon containing conductive surfaces, the first refractory metal silicide being composed of a first refractory metal and silicon from the surfaces, forming a blanket second refractory metal layer over the device, forming a blanket .alpha.-Si layer over the second refractory metal layer, forming a mask over the device to pattern an interconnect between the separate regions, then etching away the unwanted portions of the refractory metal layers and the .alpha.-Si layer, performing a rapid thermal annealing process on the device forming a low resistance refractory metal silicide between the .alpha.-Si layer and the second refractory metal layer, and then etching away the unwanted portions of the refractory metal layers that are not covered by the refractory metal silicide.
REFERENCES:
patent: 5589417 (1996-12-01), Jeng
Chan Lap
Seah Kah S.
Teo Yeow M.
Wei Che-Chia
Bilodeau Thomas G.
Chartered Semiconductor Manufacturing PTE LTD
Jones II Graham S.
Niebling John
Saile George O.
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