Method for making dual gate insulating film without edge-thinnin

Details Method for making dual gate insulating film without edge-thinnin Method for making dual gate insulating film without edge-thinnin

1995-12-21

1997-09-23

Trinh, Michael

Fishing, trapping, and vermin destroying

437 41TFT, 437238, 437247, H01L 21786

Patent

active

056704003

ABSTRACT:
A dual gate insulating film of a thin film transistor (TFT) is disclosed in which edge-thinning is eliminated by forming a thermal oxide film after depositing an oxide film by a low temperature chemical vapor deposition (CVD) method. According to the disclosed dual gate insulating film and method for making the same, exposure of gate material on edges of the gate film is prevented, grooving of the active pattern of polycrystalline silicon is reduced, and the same electric and insulating characteristics as those of the conventional thermal oxide film are obtained.

REFERENCES:
patent: 4597160 (1986-07-01), Ipri
patent: 5064775 (1991-11-01), Chang
patent: 5395804 (1995-03-01), Ueda
patent: 5504019 (1996-04-01), Miyasaka et al.

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