Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-10-21
1999-03-16
Picardat, Kevin M.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438467, 438131, H01L 2144
Patent
active
058829970
ABSTRACT:
A resistive load structure and method for making a resistive load structure for an integrated circuit includes the use of an amorphous silicon "antifuse" material. The resistive load structure can be used in an SRAM cell to provide a load to counteract charge leakage at the drains of two pull-down transistors and two pass transistors of the SRAM cell. The resistive load structure is advantageously formed by depositing an amorphous silicon pad over a conductive via, and the resistance of the resistive load structure is controlled by adjusting the thickness of the amorphous silicon pad and varying the diameter of the underlying conductive via.
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Bothra Subhas
Sur, Jr. Harlan Lee
Picardat Kevin M.
VLSI Technology Inc.
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