Method for making a semiconductor package

Details Method for making a semiconductor package Method for making a semiconductor package

1999-04-03

2001-10-30

Graybill, David E. (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C264S272170

Reexamination Certificate

active

06309914

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method for making a semiconductor package, and more particularly, to a method for making a semiconductor package having a semiconductor chip mounted on a BGA substrate.
BACKGROUND OF THE INVENTION
Nowadays, in the semiconductor industry, a semiconductor device not only compacts in size as well as light in weight without sacrificing its electrical performance, but also has maximum external I/O connections. As power and performance of semiconductor devices increase, so does the need for maximum I/O connections. One solution to this need is the so-called Ball Grid Array (BGA) semiconductor package.
As shown in
FIG. 15
, a typical BGA semiconductor package currently used by the industry usually includes a substrate
102
on which a semiconductor chip
101
is mounted. On a top surface of the substrate
102
a plurality of first conductive traces
102
b
are formed to have electrical connection with pads (not shown) on the semiconductor chip
101
by gold wires
103
. A plurality of second conductive traces
102
e
are correspondingly formed on a bottom surface of the substrate
102
and electrically connect the first conductive traces
102
b
through plated conductive vias
102
c
extending through the substrate
102
. The second conductive traces
102
e
on the bottom surface of the substrate
102
each terminate at a conductive pad
102
f
to form an array of pads
102
f
on the bottom surface of the substrate
102
. A solder boll
104
is attached to each pad
102
f
on the bottom surface of the substrate
102
to provide external electrical accessibility to the semiconductor chip
101
. An encapsulant formed by a molding compound is used to encapsulate the semiconductor chip
101
and the top surface of the substrate
102
.
In the molding process for encapsulating a semiconductor chip and the surface of a substrate on which the semiconductor chip is mounted, the mold for molding is required to have a runner connected to a central reservoir for molten molding compound to flow through the runner via a gate into a mold cavity of the mold. Therefore, after the molding is completed, the molding compound in the runner and gate is solidified on the substrate and requires subsequent removal from the substrate. The region of the substrate on which the molding compound in the runner and gate is solidified is usually called “degating region.” As the viscosity of the molding compound should be high enough to provide the molding compound sufficient adhesion with the semiconductor chip and the substrate in order to prevent delamitation from taking place, the removal of the molding compound from the degating region on the substrate becomes difficult and often causes damage and deformation to the substrate and the semiconductor package itself.
To solve the aforesaid problem, U.S. Pat. No. 5,635,671 proposes a method for the removal of excess molding compound formed on the degating region of a substrate without damaging the semiconductor device. In the '671 invention, a layer of gold is coated on the degating region of the substrate, allowing the molding compound in the runner and gate to solidified thereon. Therefore, the molding compound in the runner and gate can be easily peeled away from the degating region without damaging or deforming the substrate and the package, for the reason that the adhesive between the molding compound and the gold coating is weaker than that between the molding compound and the substrate. However, as shown in
FIG. 16
, while the method proposed in the '671 invention is applied to an matrix type substrate sheet for mass production purpose, the width of each connecting portion
112
of the substrate sheet
110
for connecting any two adjacent substrate units
111
is increased for the convenience of applying the gold coating to the predetermined degating region
113
on the substrate sheet
110
. Accordingly, the manufacturing cost of the substrate sheet
110
is increased.
Meanwhile, to avoid dislocation of the gold coating over degating region
113
from making the molding compound to directly solidify on areas beyond the degating region
113
of the substrate sheet
110
, the application of the gold coating to the degating region
113
has to be well-controllable, thereby it makes the manufacturing cost further increased. Furthermore, gold is a precious metal and can not be retrieved from the substrate for recycling after coated on the substrate. Consequently, it is too costly to use gold as the coating material.
The '671 invention also can not be applied to a BGA semiconductor package having a cavity down structure. As shown in
FIGS. 17 and 18
, the encapsulant
121
and electrically conductive solder balls
122
are located on the same side of the substrate
120
. Electrically conductive solder balls
122
are adhered to the overall top surface of the substrate
120
except the dented region
123
for receiving the chip
124
. Thus, runners of a mold are not allowed to pass through the region where conductive solder balls
122
are adhered otherwise after the molding process is completed, the top surface of the substrate
120
is contaminated by the excess molding compound cured in the runners of the mold, thereby adversely affecting the attachment of the conductive solder balls
122
to the substrate
120
.
SUMMARY OF THE INVENTION
Accordingly, it is an objective of the present invention to provide a method for making a semiconductor package that excess molding compound solidified in the runner and gate of a mold can be easily peeled away from the substrate of the semiconductor package without damaging and deforming the substrate or the encapsulant enclosing a semiconductor chip of the semiconductor package.
Another objective of the present invention is to provide a method for making a semiconductor package, which can easily remove the excess molding compound solidified in the runners and gates of a mold at a cost lower than the conventional methods, without damaging or deforming the substrate or the encapsulant enclosing a semiconductor chip of the semiconductor chip of the semiconductor package.
Still another objective of the present invention is to provide a method for making a semiconductor package, which allows the excess molding compound solidified in the runners and gates of a mold to attach to a surface of a medium instead of the surface of a substrate, thereby the surface of the substrate is free of contamination by the molding compound after molding.
A further objective of the present invention is to provide a method for making a semiconductor package, which can use a medium for the excess molding compound solidified in the runners and gates of a mold to be attached thereto, allowing the medium to be easily removed from the substrate of the semiconductor package without subsequent cleaning treatment to the substrate, after the excess molding compound is peeled away from the medium.
Still a further objective of the present invention is to provide a method for making a semiconductor package, which uses a medium for the excess molding compound solidified in the runners and gates of a mold to be attached thereto and capable of repetitive use, allowing the manufacturing cost of the semiconductor package to be reduced.
Still another further objective of the present invention is to provide a method for making a semiconductor package, which can easily mount on the substrate of the semiconductor package a medium for the excess molding compound solidified in the runners and gates of a mold to be attached thereto, without complicated positioning operation or use of auxiliary tools.
Still another further purpose of the present invention is to provide a method for making a semiconductor package, which is suitable for use of a singulated, single-arrayed, dual-arrayed, or matrix-arrayed BGA substrate.
The method for making a semiconductor package according to the aforesaid objectives of the present invention comprises the following steps:
(a) attaching a semiconductor chip to a substrate

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