Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-12-26
2006-12-26
Estrada, Michelle (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S003000, C438S240000, C438S938000, C438S110000, C257S009000, C257SE29298
Reexamination Certificate
active
07153763
ABSTRACT:
A method for making a semiconductor device may include forming a superlattice including a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include performing at least one anneal prior to completing forming of the superlattice.
REFERENCES:
patent: 4485128 (1984-11-01), Dalal et al.
patent: 4594603 (1986-06-01), Holonyak, Jr.
patent: 4882609 (1989-11-01), Schubert et al.
patent: 4908678 (1990-03-01), Yamazaki
patent: 4937204 (1990-06-01), Ishibashi et al.
patent: 4969031 (1990-11-01), Kobayashi et al.
patent: 5055887 (1991-10-01), Yamazaki
patent: 5081513 (1992-01-01), Jackson et al.
patent: 5216262 (1993-06-01), Tsu
patent: 5357119 (1994-10-01), Wang et al.
patent: 5577061 (1996-11-01), Hasenberg et al.
patent: 5594567 (1997-01-01), Akiyama et al.
patent: 5606177 (1997-02-01), Wallace et al.
patent: 5616515 (1997-04-01), Okuno
patent: 5627386 (1997-05-01), Harvey et al.
patent: 5683934 (1997-11-01), Candelaria
patent: 5684817 (1997-11-01), Houdre et al.
patent: 5994164 (1999-11-01), Fonash et al.
patent: 6058127 (2000-05-01), Joannopoulos et al.
patent: 6255150 (2001-07-01), Wilk et al.
patent: 6274007 (2001-08-01), Smirnov et al.
patent: 6281518 (2001-08-01), Sato
patent: 6281532 (2001-08-01), Doyle et al.
patent: 6326311 (2001-12-01), Ueda et al.
patent: 6344271 (2002-02-01), Yadav et al.
patent: 6350993 (2002-02-01), Chu et al.
patent: 6376337 (2002-04-01), Wang et al.
patent: 6436784 (2002-08-01), Allam
patent: 6472685 (2002-10-01), Takagi
patent: 6498359 (2002-12-01), Schmidt et al.
patent: 6501092 (2002-12-01), Nikonov et al.
patent: 6521549 (2003-02-01), Kamath et al.
patent: 6566679 (2003-05-01), Nikonov et al.
patent: 6608327 (2003-08-01), Davis et al.
patent: 6621097 (2003-09-01), Nikonov et al.
patent: 6638838 (2003-10-01), Eisenbeiser et al.
patent: 6646293 (2003-11-01), Emrick et al.
patent: 6673646 (2004-01-01), Droopad
patent: 6711191 (2004-03-01), Kozaki et al.
patent: 6748002 (2004-06-01), Shveykin
patent: 2002/0094003 (2002-07-01), Bour et al.
patent: 2003/0034529 (2003-02-01), Fitzgerald et al.
patent: 2003/0057416 (2003-03-01), Currie et al.
patent: 2003/0089899 (2003-05-01), Lieber et al.
patent: 2003/0162335 (2003-08-01), Yuki et al.
patent: 2003/0215990 (2003-11-01), Fitzgerald et al.
patent: 2004/0084781 (2004-05-01), Ahn et al.
patent: 2004/0227165 (2004-11-01), Wang et al.
Luo et al.,Chemical Design of Direct-Gap Light-Emitting Silicon, published Jul. 25, 2002, The American Physical Society; vol. 89, No. 7.
Tsu,Phenomena in Silicon Nanostructure Devices, University of North Carolina at Charlotte, Sep. 6, 2000.
Ye et al.,GaAs MOSFET with Oxide Gate Dielectric Grown by Atomic Layer Deposition, Agere Systems, Mar. 2003.
Novikov et al.,Silicon-based Optoelectronics, 1999-2003, pp. 1-6.
Fan et al.,N-and P-Type SiGe/Si Superlattice Coolers, the Seventeenth Intersociety Conference on Thermomechanical Phenomena in Electronic Systems (ITherm 2000), vol. 1. pp. 304-307, Las Vegas, NV, May 2000.
Shah et al.,Experimental Analysis and Theoretical Model for Anomalously High Ideality Factors(n>2.0)in AlGaN/GaN P-N Junction Diodes, Journal of Applied Physics, vol. 94, No. 4, Aug. 15, 2003.
Ball,Striped Nanowires Shrink Electronics, news@nature.com, Feb. 7, 2002.
Fiory et al.,Light Emission from Silicon: Some Perspectives and Applications, Journal of Electronic Materials, vol. 32, No. 10, 2003.
Lecture 6: Light Emitting and Detecting Devices, MSE 6001, Semiconductor Materials Lectures, Fall 2004.
Harvard University Professor and Nanosys Co-Founder, Charlie Lieber, Raises the Stakes in the Development of Nanoscale Superlattice Structures and Nanodevices, 2004 Nanosys, Inc.
Hytha Marek
Kreps Scott A.
Stephenson Robert John
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Estrada Michelle
RJ Mears, LLC
Stark Jarrett
LandOfFree
Method for making a semiconductor device including... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for making a semiconductor device including..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for making a semiconductor device including... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3714940