Method for making a flower shaped DRAM capacitor

Details Method for making a flower shaped DRAM capacitor Method for making a flower shaped DRAM capacitor

1998-03-12

2000-03-28

Whitehead, Jr., Carl

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438329, 438396, 438393, 438253, 438239, H01L 218222, H01L 2120, H01L 218242

Patent

active

060431318

ABSTRACT:
A method of forming a flower shaped capacitor for a DRAM over a bitline is disclosed. The method comprises the steps of: forming a first polysilicon layer over said bitline; forming a TEOS layer over said first polysilicon layer, patterning and etching an opening through said TEOS layer; depositing a second polysilicon layer; etching back said second polysilicon layer and the first polysilicon layer to form sidewall spacers in said opening; using the first polysilicon layer and sidewall spacers as a mask, etching through to said bitline and thereby removing said TEOS layer; depositing a third polysilicon layer; patterning and etching the third polysilicon layer to form a bottom storage node of the capacitor; and forming a dielectric layer and a top conductive layer over the bottom storage node.

REFERENCES:
patent: 5478768 (1995-12-01), Iwasa
patent: 5780338 (1998-07-01), Jeng et al.
patent: 5854106 (1998-12-01), Wu

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