Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2008-05-13
2008-05-13
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C257SE21444
Reexamination Certificate
active
11556368
ABSTRACT:
A semiconductor device includes a memory array having a plurality of non-volatile memory cells. Each non-volatile memory cell of the plurality of non-volatile memory cells has a gate stack. The gate stack includes a control gate and a discrete charge storage layer such as a floating gate. A dummy stack ring is formed around the memory array. An insulating layer is formed over the memory array. The dummy stack ring has a composition and height substantially the same as a composition and height of the gate stack to insure that a CMP of the insulating layer is uniform across the memory array.
REFERENCES:
patent: 5510639 (1996-04-01), Okuda et al.
patent: 6358816 (2002-03-01), Singh et al.
patent: 6406976 (2002-06-01), Singh et al.
patent: 6483749 (2002-11-01), Choi et al.
patent: 6690067 (2004-02-01), Ker et al.
patent: 6879045 (2005-04-01), Ireland
patent: 2004/0047217 (2004-03-01), Kamiya
patent: 2004/0171243 (2004-09-01), Lee et al.
patent: 2005/0023617 (2005-02-01), Schoellkopf et al.
patent: 2005/0035416 (2005-02-01), Kuroda et al.
patent: 2006/0011964 (2006-01-01), Satou
Hill Susan C.
Le Thao P.
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