Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-04-13
2004-07-13
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S597000, C438S735000, C438S795000
Reexamination Certificate
active
06762131
ABSTRACT:
FIELD OF INVENTION
The present invention generally relates to processes for atomic-scale modification of surfaces, and more particularly to methods for fabricating atomic-scale structures on a surface of a material on a large-scale with atomic precision.
BACKGROUND
Atomic-scale modification of material surfaces has been demonstrated since the late 1980's with the advent of the scanning tunneling microscope (STM). Initially, the STM had been used to obtain atomic-resolution images of surfaces, but later, the STM has also been used for atomic-scale modification of surfaces. The STM includes a conducting needle which is held close to a conducting surface. By adjusting the position and the voltage applied to the tip of the needle, individual or cluster of atoms are removed from the surface and deposited on the STM tip. The tip is then moved to a predetermined surface site and the atoms are redeposited.
Over the years various techniques, including direct manipulation of atoms through UHV (ultrahigh vacuum)-STM tips, nano-patterning by changing local chemical-state of surfaces, etc., have been proposed to achieve device miniaturization. These known techniques, however, have not been utilized for industrial applications. This is primarily due to the fact that these techniques can only modify very localized area (generally tens of nanometers). The STM-based technique is also an extremely slow process, which requires one-by-one positioning of each individual or clusters of atoms. The traveling speed of the STM tip is typically about 0.4 nm/s, therefore it would require enormous amount of time (months) to scan just one piece of an 8-inch Si wafer. These known STM-based techniques may be useful for scientific studies on growth of atomic-scale structures at a small-scale. However, they are not appropriate as a large-scale manufacturing technique for the use in the semiconductor industry.
SUMMARY OF THE INVENTION
The present invention relates to a method for forming atomic-scale structures on a surface of a substrate on a large-scale. The method includes creating a predetermined amount of surface vacancies on the surface of the substrate by removing an amount of atoms on the surface of the material corresponding to the predetermined amount of surface vacancies. Once the surface vacancies have been created, atoms of a desired structure material are deposited on the surface of the substrate to enable the surface vacancies and the atoms of the structure material to interact. This interaction causes the atoms of the structure material to form the atomic-scale structures.
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Greene Joseph E.
Lim Chong Wee
Ohmori Kenji
Petrov Ivan Georgiev
Ghyka Alexander
Greer Burns & Crain Ltd.
The Board of Trustees of the University of Illinois
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