Method for isolation of optical defect images

Details Method for isolation of optical defect images Method for isolation of optical defect images

1999-02-09

2001-03-13

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

With measuring or testing

C438S014000, C438S016000, C382S145000, C382S149000, 36

Reexamination Certificate

active

06200823

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the manufacturing of high performance semiconductor devices. More specifically, this invention relates to a method of isolating optical defect images that have been captured during inspection for defects.
2. Discussion of the Related Art
In order to remain competitive, a semiconductor manufacturer must continually increase the performance of the semiconductor integrated circuits being manufactured and at the same time, reduce the cost of the semiconductor integrated circuits. Part of the increase in performance and the reduction in cost of the semiconductor integrated circuits is accomplished by shrinking the device dimensions and by increasing the number of circuits per unit area on an integrated circuit chip. Another part of reducing the cost of a semiconductor chip is to increase the yield. As is known in the semiconductor manufacturing art, the yield of chips (also known as die) from each wafer is not 100% because of defects occurring during the manufacturing process. The number of good chips obtained from a wafer determines the yield. As can be appreciated, chips that must be discarded because of a defect increases the cost of the remaining usable chips.
Each semiconductor chip requires numerous process steps such as oxidation, etching, metallization and wet chemical cleaning. In order to etch metal lines, for example, a layer of photoresist is formed on the surface of the semiconductor chips and patterned by developing the photoresist and washing away the unwanted portion of the photoresist. Because the metal lines and other metal structures have “critical” dimensions, that is, dimensions that can affect the performance of the semiconductor chip, the process of forming the photoresist pattern for each layer is examined during the manufacturing process. Some of these process steps involve placing the wafer on which the semiconductor chips are being manufactured into different tools during the manufacturing process. The optimization of each of these process steps requires an understanding of a variety of chemical reactions and physical processes in order to produce high performance, high yield circuits. The ability to view and characterize the surface and interface layers of a semiconductor chip in terms of their morphology, chemical composition and distribution is an invaluable aid to those involved in research and development, process, problem solving, and failure analysis of integrated circuits.
In the course of modern semiconductor manufacturing, semiconductor wafers are routinely inspected using “scanning” tools to find defects. The scanning tool determines the location and other information concerning defects that are caught and this information is stored in a data file for later recapture and inspection of any of the defects. These data files are stored in a relational database that has the ability to generate wafer maps with defects shown in their relative positions. The data database typically has the ability to send these wafer map files to various review tools within the manufacturing plant. This is very useful as it allows for re-inspection on various after-scan inspection tools within the manufacturing plant. These inspection tools include Optical Microscopes and Scanning Electron Microscopes (SEMs) that allow for classification of the defects. Images taken on the various after-scan inspection tools can be linked by linkage data to the defect on a wafer map and reviewed at a workstation at an engineer's or technician's convenience.
In order to be able to quickly resolve process or equipment issues in the manufacture of semiconductor products, a great deal of time, effort and money is expended on the capture and classification of silicon based defects. Once caught and properly described, work can begin in earnest to resolve the cause, to attempt elimination, and to determine adverse effects on device parametrics and performance. The over-riding difficulty to date is the training and maintaining a cadre of calibrated human inspectors who classify all defects consistently and without error. One of the frustrations of human classifiers can be attributed to the inability to isolate or extract the defect in question from its original background environment.
Optical scan tools use a comparative method to find defects. The comparative method uses a reference die or cell to “look” for a difference between the reference and the current image. The difference is the so-called defect. The scan tool is often able to detect differences between the reference and current image, which it calls defects, which are not discernable by the human defect classifier. These type of differences or anomalies are generally referred to as nuisance or non-visual defects and they present the difficulty of determining whether they are a false signal based on poor recipe set-up or real defects, that are too small to be “seen” optically. Both situations are unacceptable in that in the first case the scan tool and the human classifier are wasting precious time investigating erroneous data while in the second case a potentially fatal process excursion may continue unabated even though caught by the scan tool manifesting itself in lost yield.
FIG. 1
shows a typical prior art method of manufacturing and inspecting wafers during the manufacturing process. A wafer lot is started through a manufacturing process, as indicated at
100
. The first layer of each wafer of the wafer lot is subjected to a first process,
102
. After the first process is completed, a selected number of wafers are inspected for defects at
104
and are called inspection wafers. The defect data is stored at
106
and information concerning the defect is forwarded to a defect management system (DMS)
108
. It is determined at
110
if a wafer map exists. If it is determined at
110
that a wafer map exists, the defect information is added to the existing wafer map. If it is determined at
110
that a wafer map does not exist, a wafer map is created at
114
and the defect information is added to the newly created wafer map. The coordinates of the defect data from the wafer map and other defect information are stored in the defect management system
108
.
After the wafers have been inspected at
104
, the inspection wafer is placed in an optical tool at
116
. The optical tool at
116
can be a microscope or a scanning electron microscope (SEM). With information concerning defects obtained from the defect management system
108
, the optical tool scans to a defect location so that the operator can inspect and classify the defect. The operator “flips” between adjacent die in order to locate the defect visually, as indicated at
118
. The methodology is indicated at
120
and shows 5 die with a feature indicated at
122
. When the operator “flips” between the feature
122
, for example, between the die
124
and
126
, the operator will see no difference. On the other hand, when the tool locates feature
134
on die
130
and when the operator flips between die
130
and either die
128
or
132
, the operator may or may not be able to see the feature depending upon the size of the feature and the background on the respective die.
After the operator optically scans the wafer at
118
, it is determined at
136
if the layer just inspected is the last layer. If it is determined at
136
that the layer just processed is not the last layer, the next layer on all the wafers is processed, as indicated at
138
and the layer is inspected at
104
. If it is determined at
136
that the layer just processed is the last layer, the wafer lot is finished as indicated at
140
.
Therefore, what is needed is a system that is able to present to the operator of the optical tool an optical representation of the difference the tool is detecting. One method of doing this would be simply to “subtract” the so-called reference image from the defect image, on a pixel by pixel basis, and present that difference on a monitor. This method allows the operator

Affiliated with

Also associated with

Rating

Method for isolation of optical defect images does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for isolation of optical defect images, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for isolation of optical defect images will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2506745