Method for interconnecting the active zones and/or the gates of

Details Method for interconnecting the active zones and/or the gates of Method for interconnecting the active zones and/or the gates of

1985-03-15

1986-12-30

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29571, 29591, 148187, 156646, 156653, 156656, 1566591, 156662, 357 231, 357 41, 357 67, 357 71, 427 88, 427 90, C23F 102, B44C 122, C03C 1500, C03C 2506

Patent

active

046327258

ABSTRACT:
A method for interconnecting the active zones and/or the gates of a C/MOS integrated circuit characterized in that, after producing the constituent elements of the integrated circuit with the exception of the connections, on the complete circuit is directly deposited a coating of a conductive material, which is then etched in order to form the desired connection.

REFERENCES:
patent: 4111725 (1978-09-01), Cho et al.
patent: 4267012 (1981-05-01), Pierce et al.
patent: 4432133 (1984-02-01), Furuya
patent: 4461071 (1984-07-01), Poleshuk
patent: 4478679 (1984-10-01), Chang et al.
Miller, Nicholas E. et al., "CVD Tungsten Interconnect and Contact Barrier Technology for VLSI", Solid State Technology, vol. 25, Dec. 1982, pp. 85-90.

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