Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-11-13
2004-03-02
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S654000, C438S655000, C438S656000, C438S658000, C438S685000, C427S569000, C427S570000, C427S573000
Reexamination Certificate
active
06699788
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of semiconductor devices. More particularly, the present invention relates to a method for forming a CVD metal film.
2. Related Art
In conventional in Complimentary Metal Oxide Semiconductor (CMOS) device fabrication processes, semiconductor devices are formed on a semiconductor substrate using a thin gate oxide layer that forms gates between conductive regions in the semiconductor substrate. Overlying metal interconnect structures provide for electrical connection to the underlying semiconductor devices.
CVD metal films are formed in Damascene structures or in blanket films which are subsequently patterned and etched by a variety of chemical, mechanical, plasma, or wet processing steps. The resultant metal interconnect structures provide electrically active pathways for integrated circuits.
Conventional methods for forming CVD metal films use a two-step process. First, a nucleation seed layer is deposited. The nucleation seed layer is critical to device protection and step coverage of the CVD metal film.
This is followed by bulk deposition. The bulk deposition step provides the required thickness of the CVD metal film. In conventional processes, an aggressive precursor is used such as, for example, a halogenated gas. The nucleation seed layer protects the underlying structure from damage during the subsequent bulk deposition step. If the nucleation layer has insufficient thickness or coverage, the halogenated gas will damage the underlying structure(s).
The nucleation film is counterproductive to getting good bulk deposition. More particularly, when too thick of a nucleation layer is used, the resulting bulk deposition does not have good fill characteristics. However, when the nucleation layer is insufficient, though good fill characteristics are obtained, there is insufficient device protection that can lead to device damage and device failure.
In a typical semiconductor manufacturing process, nucleation and bulk deposition processes are performed sequentially as separate process steps. There is typically a pause between the step of depositing the nucleation seed layer and the bulk deposition step. The termination of the step of depositing the nucleation seed layer and the pause between the nucleation and bulk deposition steps affects manufacturability. More particularly, the pause results in increased process time. This adds to the cost of manufacturing semiconductor devices.
What is needed is a way to obtain a CVD metal film that has both good fill characteristics and device protection. In addition, a method is required that meets the above need and that provides for reduced process time. The present invention provides a solution to the above needs.
SUMMARY OF THE INVENTION
The present invention provides a method for forming a CVD metal film that has good fill characteristics and that does not damage underlying devices and structures. In addition, the method of the present invention reduces process time, hence giving manufacturability and cost improvements.
An integrated nucleation and bulk deposition process is disclosed. In the integrated deposition process of the present invention, nucleation seed deposition and bulk deposition are performed in an integrated and contemporaneous manner. In the present embodiment, nucleation seed deposition and bulk deposition are performed in a continuous multi-step process flow to achieve a CVD metal film having good fill characteristics and adequate protection of any underlying structures. Because nucleation and bulk deposition are performed contemporaneously, there is no separation between the process of nucleation and bulk deposition as occurs in prior art processes.
In one embodiment, structures are formed on a semiconductor substrate. The semiconductor substrate is then placed into a reaction chamber. In one embodiment, the reaction chamber is a chemical vapor deposition reaction chamber. The reaction chamber is then pressurized.
Flow of a reactant gas into the reaction chamber is then initiated. In the present embodiment, the reactant gas is tungsten hexafloride. Alternatively, other reactant gasses could be used such as, for example, titanium tetrachloride. Flow of a reducing agent gas into said reaction chamber is also initiated. In one embodiment, the reducing agent gas includes hydrogen gas and silane gas. However, alternatively, other reducing agents could be used such as, for example, NH
3
. In the present invention, flow of reactant gas is contemporaneous with the flow of reducing agent gas in a continuous process flow so as to form a CVD metal film over the structures formed on the semiconductor substrate.
As the integrated deposition process progresses, flow of reactant gas is increased and flow of reducing agent gas is decreased. Also, as the integrated deposition process progresses, pressure is increased. In, the present embodiment, flow of reactant gas, flow of reducing agent gas and pressure are incrementally changed a number of times throughout the integrated deposition process.
The integrated deposition process of the present invention gives a significant decrease in process time as compared to prior art processes. This results in cost savings. In one embodiment, the method of the present invention provides process time savings of over 25 percent as compared to prior art processes. This is significant, particularly in light of the fact that the process of the present invention is performed five to six times during the fabrication of a typical semiconductor chip.
The method of the present invention provides an additional degree of freedom that is not present in prior art processes which is the ability to trade off flow of reacting agent (and reducing agent) with total pressure. Moreover, the method of the present invention allows for reactant and reactant agent flows, partial pressures and total pressure to be continuously and simultaneously modulated in-situ. Thus, in the present invention, different growth mechanisms are combined, allowing for superior device protection while keeping less conformal growth mechanisms to a minimum thickness, thereby maximizing step coverage and film conformity. This allows for optimization of fill characteristics relative to protection requirements. Thereby, a CVD metal film can be obtained having superior fill characteristics as compared to prior art processes.
Accordingly, the integrated deposition process of the present invention gives good fill characteristics while providing sufficient protection to underlying structures. In addition, the method of the present invention provides for reduced process time as compared to prior art processes.
These and other objects and advantages of the present invention will become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments that are illustrated in the various drawing figures.
REFERENCES:
patent: 5866213 (1999-02-01), Foster et al.
patent: 6113699 (2000-09-01), Hansen
patent: 6309966 (2001-10-01), Govindarajan et al.
Eristoff Guy
Lee Sarion C. S.
Leong Liew San
Meng Goh Khoon
Berry Renee R.
Chartered Semiconductors Manufacturing Limited
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