Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2011-03-22
2011-03-22
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257SE21585
Reexamination Certificate
active
07910480
ABSTRACT:
Disclosed herein is a method for insulating wires of a semiconductor device. One embodiment of the method includes forming first bit line stacks over a cell region of a semiconductor substrate and second bit line stacks over a peripheral region of the semiconductor substrate, and forming a Spin On Dielectric (SOD) layer to fill between the first and second bit line stacks. The method also includes etching back the SOD layer to expose upper side portions of the first and second bit line stacks, selectively removing a portion of the SOD layer present on the peripheral region, and depositing a High Density Plasma (HDP) insulation layer to cover a portion of the SOD layer present on the cell region, and to fill between the second bit line stacks present on the peripheral region.
REFERENCES:
patent: 6333219 (2001-12-01), Park et al.
patent: 2009/0004839 (2009-01-01), Eun
patent: 10-2008-0055162 (2008-06-01), None
patent: 10-0875656 (2008-12-01), None
Coleman W. David
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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