Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-01-13
1998-09-22
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395651, 395834, 711154, 711166, 36518904, G06F 900
Patent
active
058128425
ABSTRACT:
A method for initially programming a synchronous dynamic random access memory (SDRAM) device to have a first control operating option in response to a first command and for reprogramming the SDRAM device to have a second control operating option in response to a second command without interrupting the active state of the memory array.
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Fast DRAMs Can Be Swapped for SRAM Caches--Electronic Design, Jul. 22, 1993 pp. 55-67.
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Schaefer Scott
Williams Brett
Micro)n Technology, Inc.
Peikari J.
Swann Tod R.
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