Method for increasing the capacitance of a semiconductor...

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

Reexamination Certificate

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C438S397000, C438S396000, C438S739000

Reexamination Certificate

active

06358813

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to improved semiconductor capacitors that are particularly useful for manufacturing improved dynamic random access memory (DRAM), among other semiconductor devices.
BACKGROUND OF THE INVENTION
Dynamic random access memory (DRAM) is well known in the art, the first commercially available DRAM having been the Intel 1103, introduced to the market in 1970. In a typical DRAM, information is stored in semiconductor capacitors on a metal oxide semiconductor (MOS) integrated circuit. Each semiconductor capacitor has a transistor associated with it, such that each transistor/capacitor combination forms a storage cell, or node, that can hold a single bit of information. Unfortunately, the capacitors leak so the storage nodes must be refreshed periodically. As these devices are scaled down to increasingly smaller sizes, the capacitance of the storage nodes is a limitation. There is a need for a method of increasing the capacitance of such storage nodes while also making them smaller.
BRIEF SUMMARY OF THE INVENTION
Described is a method of increasing the topography of a semiconductor capacitor such as to effectively increase the capacitance of the capacitor without increasing the size of the capacitor. This is achieved by superimposing a topography, such as an array of holes or islands, onto the electrodes of the capacitor, wherein the elements of the topography (i.e., the holes or islands) are generally about an order of magnitude smaller than the capacitor itself.


REFERENCES:
patent: 5757612 (1998-05-01), Acosta et al.
Mansky et al., “Nanolithographic templates from diblock copolymet thi films”, 1996, Applied Physics Letters, vol. 68, pp. 2586-2588, Apr. 29, 1996.*
Morkved et al., “Mesoscopic self assembly of gold islands on diblock copolymet films”, Science, v. 273,pp. 931, 1998.*
Mansky et al., Nanolithograpi Templates from Diblock copolymer Thin Films,Applied Physics Letters, vol. 68, pp. 2586-2588 (Apr., 1996).
Park et al., Block Polymer Lithography: Periodic Arrays of 10″ Holes in 1 Square Centimeter, Science, vol. 276, May 30, p. 1401-1404 (1997).
Morkved et al., Science, v. 273, p. 931 (1998).
Morkved et al.,Applied Physics Letters, v. 64, p. 422.
Journal of Materials Science, v. 30, p. 1987 (1995).
Li et al., Journal of the American Chemical Society, v. 118, p. 10982 (1996).

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