Method for increasing cache directory associativity classes...

Details Method for increasing cache directory associativity classes... Method for increasing cache directory associativity classes...

2011-04-12

2011-04-12

Elmore, Reba I (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

C711S128000, C711S141000

Reexamination Certificate

active

07925857

ABSTRACT:
In a method of generating a cache directory to include a plurality of associativity classes, each associativity class includes an address tag including a plurality of address bits. Each address tag is configured to store a unique address to a specific location in an memory space. An amount of memory that is in an actually configured portion of the memory space is determined. A minimum number of bits necessary to address each memory location in the actually configured portion of the memory space is determined. Each address tag is configured in each associativity class to include the minimum number of bits necessary to address each memory location in the actually configured portion of the memory space. The cache directory is configured to include a maximum number of associativity classes per line in the cache directory.

REFERENCES:
patent: 6138209 (2000-10-01), Krolak et al.
patent: 6192458 (2001-02-01), Arimilli et al.

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