Method for incorporating silicon into CVD metal films

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S648000, C438S658000, C438S680000, C438S685000

Reexamination Certificate

active

06562708

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to methods of treating metal films deposited onto a substrate by chemical vapor deposition, and more specifically to a method of incorporating silicon into a tantalum film deposited by plasma enhanced chemical vapor deposition.
BACKGROUND OF THE INVENTION
In the formation of integrated circuits (IC), thin films containing metal and metalloid elements are deposited upon the surface of a semiconductor substrate or wafer. The films provide conductive and ohmic contacts in the circuits and between the various devices of an IC. For example, a thin film of a desired metal might be applied to the exposed surface of a contact or via in a semiconductor substrate. The film, passing through the insulative layers of the substrate, provides plugs of conductive material for the purpose of making interconnections across the insulating layers. One well-known process for depositing thin metal films is chemical vapor deposition (CVD). Another well-known process is physical vapor deposition (PVD), also referred to as sputtering.
In silicon-based integrated circuit technology, aluminum, copper, or tungsten may be used for interconnections and contacts. These conductor materials are typically deposited onto a diffusion barrier layer, such as TiN, Ta, TaN, and WN, which provide a barrier between the conductor and the silicon or silicon-based substrate. Copper as the conductor material is of particular interest due to its lower electrical resistivity and higher resistance to electromigration as compared to aluminum. However, copper has a high mobility and lifetime degradation in silicon, and will react to silicon at low annealing temperature. Thus, a high level of performance must be borne by diffusion barriers in copper metallizations of silicon.
It is generally believed that the addition of silicon to diffusion barrier layers, such as tantalum, improves the film's resistance to copper diffusion. It is believed that formation of silicides circumvents fast grain boundary diffusion of copper atoms through the barrier layers to the silicon substrate surface. In Harada et al., “Surface Modification of MOCVD-TiN Film by Plasma Treatment and SiH
4
Exposure for Cu Interconnects,” Conference Proceedings ULSI XIV pp. 329-335 (1999 Materials Research Society), a method was proposed for incorporating silicon into a TiN barrier layer deposited by MOCD using TDMAT (tetrakis-dimethylamino-titanium). Plasma treatment alone was found to be ineffective for densifying the film, due to the plasma treatment process leaving the porous TiN film untreated on the sidewalls of substrate features. Likewise, a SiH
4
exposure alone was found to be ineffective in that it increased the via resistance to an unacceptable degree. The solution was found to be a plasma treatment of the TiN film followed by exposure to SiH
4
to achieve both high barrier performance on the sidewalls of substrate features and the low resistivity of the film. It was found that the anisotropic nature of the plasma treatment induced the self-aligned surface modification of TiN film during the SiH
4
exposure. It is noted that the method discussed in Harada et al. required a non-dense film in order to be effective. Further, if the TiN film was densified with a plasma anneal in an ammonia environment, then the thermal silane anneal was less effective due to most of the silicon being at the surface rather than penetrating to the bulk of the densified film. Moreover, Ti and TiN barrier layers are generally considered to be less effective as barriers to copper as compared to Ta and TaN barrier layers.
Sputtered tantalum (Ta) and reactive sputtered tantalum nitride (TaN) have been demonstrated to be good diffusion barriers between copper and a silicon-based substrate due to their high conductivity, high thermal stability and resistance to diffusion of foreign atoms. A discussion of the thermodynamic stability of Ta—Si/Cu bilayers may be found in Reid et al., “Thermodynamic Stability of Ta-Si/Cu Bilayers,” Conference Proceedings ULSI-VII pp. 285-291 (1992 Materials Research Society) in which Ta—Si barrier layers were deposited onto silicon dioxide by physical vapor deposition (PVD) from a Ta—Si sputter target, followed by copper PVD. Reid et al. predicted the tantalum silicide compounds are stable with copper at room temperature, and assuming that finding also holds at higher temperatures, implied that copper will not react with any tantalum silicide during annealing on the basis of thermodynamics.
However, PVD-deposited Ta films inherently have poor step coverage due to shadowing effects. Thus, the sputtering process is limited to relatively large feature sizes (>0.3 &mgr;m) and small aspect ratio contact vias. CVD offers the inherent advantage over PVD of better con formality, even in small structures (<0.25 &mgr;m) with high aspect ratios. However, CVD of Ta with metal-organic sources such as tertbutylimidotris-diethylamido-tantalum (TBTDET), pentakis-dimethylamino-tantalum (PDMAT) and pentakis-dietlvllamiiino-tanitallllum (PDEAT) yields mixed results. An additional problem with MOCVD of Ta is that the resulting films have relatively high concentrations of oxygen and carbon impurities.
A process to deposit Ta at the relatively low temperatures used in PECVD (<500° C.) would provide an advantage in the formation of copper barriers in the next generation of IC. Ideally, the PECVD Ta film will have a high step coverage (the ratio of the coating thickness at the bottom of a feature to the thickness on the sides of a feature or on the top surface of the substrate or wafer adjacent the feature), good diffusion barrier properties, minimal impurities, low resistivity and good conformality (even coverage of complex topography of high aspect ratio features). Moreover, while Reid et al. recognized the effectiveness of amorphous silicides in tantalum diffusion barriers in the context of PVD, a method is needed for incorporating silicon into PECVD tantalum films used as barrier layers in copper metallization of silicon.
SUMMARY OF THE INVENTION
The present invention provides a method for treating a tantalum barrier film to incorporate silicon therein to provide a semiconductor device having improved diffusion barriers properties. To this end, the tantalum film is deposited by PECVD with periodic interruption of the deposition for a silane containing plasma treatment of the deposited film. In one example, a silicon-based substrate was fabricated having a tantalum barrier film on its surface and on the surfaces of a recessed feature with about 15% conformality and about 5% silicon incorporated substantially uniformly throughout the film.


REFERENCES:
patent: 5919531 (1999-07-01), Arkles et al.
patent: 5989999 (1999-11-01), Levine et al.
patent: 6054398 (2000-04-01), Pramanick
patent: 6238737 (2001-05-01), Chan et al.
patent: 6284655 (2001-09-01), Marsh
patent: 0869544 (1998-10-01), None
patent: WO 00/65640 (2000-11-01), None
Harada et al.,Surface Modification of MOCVD-TiN Film by Plasma Treatment and SiH4 Exposure for Cu Interconnects, Materials Research Society Conference Proceedings ULSI XIV, 1999.
Reid et al.,Thermodynamic Stability of Ta-Si/Cu Bilayers, Materials Research Society Conference Proceedings ULSI-VII, 1992.

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