Method for in-place memory interleaving and de-interleaving

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S127000, C711S165000, C711S202000, C711S205000, C711S206000, C711S207000, C711S220000, C711S221000, C711S003000, C711S005000, C365S230030, C365S230040

Reexamination Certificate

active

10935560

ABSTRACT:
A method for in-place interleaving and de-interleaving of a memory includes, in one embodiment, generating a new address corresponding to a new location in the memory by performing a bit-wise XOR operation on a number of bits of a first portion of a current address and a number of bits of a different portion of the current address. The current address corresponds to a current location in the memory. In addition, the method includes performing a data swap on data stored at the current location with data stored at the new location.

REFERENCES:
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patent: 5606650 (1997-02-01), Kelley et al.
patent: 6381668 (2002-04-01), Lunteren
patent: 6473845 (2002-10-01), Hornung et al.
patent: 2003/0135670 (2003-07-01), Anderson
patent: 2005/0091466 (2005-04-01), Larson et al.
“Using Hardware Counters to Automatically Improve Memory Performance”; Mustafa M. Tikir & Jeffrey K. Hollingsworth; Computer Sciences Department, University of Maryland, College Park, MD; pp. 1-12.

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