Method for improving visibility of alignment targets in semicond

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

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257750, H01L 23544

Patent

active

057604835

ABSTRACT:
Methods are disclosed that enhance the contrast between alignment targets and adjacent materials on a semiconductor wafer. According to a first embodiment, the TiN layer that is deposited during an earlier processing step is stripped away to enhance the reflectivity of the metal layer. According to a second embodiment, a reflective coating is added over the metal layer to enhance the reflectivity of the metal layer. According to a third embodiment, a reflective coating is added over the entire wafer to enhance the reflectivity of the metal layer. According to a fourth embodiment, an anti-reflective coating in a sandwich structure is added to reduce the reflectivity of the material adjacent the alignment targets. According to a fifth embodiment, an organic anti-reflective coating is added to reduce the reflectivity of the material adjacent the alignment targets. All of these embodiments result in a contrast between the alignment target and the adjacent material that is more consistent over variations in oxide thickness. The more uniform contrast makes it easier for the stepper system to identify the edges of the alignment targets, resulting in a more exact placement of the mask.

REFERENCES:
patent: 4407933 (1983-10-01), Fraser et al.
patent: 4529685 (1985-07-01), Borodovsky
patent: 4614433 (1986-09-01), Feldman et al.
patent: 4640888 (1987-02-01), Itoh et al.
patent: 5237199 (1993-08-01), Morita
patent: 5314837 (1994-05-01), Barber et al
patent: 5481362 (1996-01-01), Van Den Brink et al.
patent: 5640053 (1997-06-01), Caldwell

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