Method for improving transistor performance through reducing...

Details Method for improving transistor performance through reducing... Method for improving transistor performance through reducing...

2005-09-27

2005-09-27

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Germanium or silicon or ge-si on iii-v

C438S739000

Reexamination Certificate

active

06949482

ABSTRACT:
An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the source and drain regions. The interface of the silicon germanium and the nickel silicon germanium silicide has a lower specific contact resistivity based on a decreased metal-semiconductor work function between the silicon germanium and the silicide and the increased carrier mobility in silicon germanium versus silicon. The silicon germanium may be doped to further tune its electrical properties. A reduction of the external resistance of a transistor equates to increased transistor performance both in switching speed and power consumption.

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