Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2011-06-28
2011-06-28
Kerveros, James C (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
Reexamination Certificate
active
07971109
ABSTRACT:
Embodiments of the invention enable the integrity of data processed by a switch to be guaranteed better than 10−9undetected erroneous frames per flight hour. To do this, rules for disabling ports are included in the switch management program. These rules include a maximum absolute admissible number of erroneous frames, to a maximum relative rate of admissible erroneous frames and a minimum number of erroneous frames constituting a significance threshold. Random errors are detected at the level of each frame due to the insertion of a CRC. Deterministic or data-dependent errors able to deceive systematically the CRC check are made random by means of a frame index.
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Andreoletti Remi
Pitot Christian
Toillon Patrice
Kerveros James C
Stroock & Stroock & Lavan LLP
Thales
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