Method for improving erase saturation in non-volatile memory...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S324000, C257SE29304

Reexamination Certificate

active

07626226

ABSTRACT:
Non-volatile memory devices are disclosed. In a first example non-volatile memory device, programming and erasing of the memory device is performed through the same insulating barrier without the use of a complex symmetrical structure. In the example device, programming is accomplished by tunneling negative charge carriers from a charge supply region to a charge storage region. Further in the example device, erasing is accomplished by tunneling positive carriers from the charge supply region to the charge storage region. In a second example non-volatile memory device, a charge storage region with spatially distributed charge storage region is included. Such a charge storage region may be implemented in the first example memory device or may be implemented in other memory devices. In the second example device, programming is accomplished by tunneling negative charge carriers from a charge supply region to the charge storage region. In the second example device, the tunneled negative charge carriers are stored in the discrete storage sites.

REFERENCES:
patent: 6617639 (2003-09-01), Wang et al.
patent: 6784484 (2004-08-01), Blomme et al.
patent: 1 411 555 (2004-04-01), None
patent: 1 487 013 (2004-12-01), None
patent: 1 411 555 (2005-02-01), None
patent: 1 487 013 (2006-07-01), None
Blomme, P. et al., “Multilayer Tunneling Barriers for NonVolatile Memory Applications”, Device Research Conference, 2002, 60th DRC. Conference Digest, Jun. 24-26, 2002, pp. 153-154.
Blomme, Pierter et al., “Improvement of Write/Erase Cycling of Memory Cells with SiO2/HfO2 Tunnel Dielectric”, Integrated Reliability Workshop Final Report, 2003 IEEE International, Lake Tahoe, CA, Oct. 20-23, 2003; pp. 95-98.
European Search Report, European Application No. EP 07 12 1233, dated Feb. 18, 2009.
Blomme, P. et al., “Multilayer Tunneling Barriers for NonVolatile Memory Applications”, Device Research Conference, 2002, 60th DRC. Conference Digest, Jun. 24-26, 2002, pp. 153-154.
Blomme, Pierter et al., “Improvement of Write/Erase Cycling of Memory Cells with SiO2/HfO2 Tunnel Dielectric”, Integrated Reliability Workshop Final Report, 2003 IEEE International, Lake Tahoe, CA, Oct. 20-23, 2003; pp. 95-98.
European Search Report, European Application No. EP 07 12 1233, dated Feb. 18, 2009.

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