Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2004-08-31
2008-12-09
Portka, Gary J (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
07464218
ABSTRACT:
A method for improving throughput performance of a data storage device by executing an execution critical write-back data priority routine programmed into a controller of the data storage device. The method includes, determining a write-back data aging threshold limit; identifying and executing a pending command; recognizing write-back data exceeding the aging threshold limit as an ending position aged data execution command; determining a read/write head following an execution of a pending command; determining a latency portion of the aged data execution command based on the determined head position; ascertaining a total execution time for each of a plurality of commands based on the determined head position; selecting from the plurality of commands an additional command executable within the determined latency portion; and executing both the additional command and the aged data execution command following execution of the pending command, when the total execution time of the aged data execution command is unaffected.
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Fox Travis D.
Olds Edwin S.
Thiessen Mark A.
Eland Shawn
Fellers , Snider, et al.
Portka Gary J
Seagate Technology LLC
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