Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-05-18
2009-06-23
Myers, Paul R (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S116000
Reexamination Certificate
active
07552268
ABSTRACT:
A PCI bridge device includes an arbiter that uses state information comprised of knowledge of the bus protocol and a history of recent transactions to predict the type of transaction a requestor will issue. The prediction is then used as a basis to mask or allow bus requests from the requester. The arbiter does not grant access to devices that will predictably issue transactions that do not result in the transfer of data. This approach can decrease time wasted by devices attempting unsuccessful transactions and can provide a commensurate increase in bus utilization. The overall effect is an increase in average bus bandwidth and a decrease in average data transfer latencies.
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PCI Special Interest Group, “PCI Local Bus Specification”, Aquired at: http://www.ece.mtu.edu/faculty/btdavis/courses/mtu—ee3173—f04/papers/PCI—22.pdf, Chapter 3—“Bus Operation” Section 3.3, 3.4 and 3.5, pp. 46-88, Revision 2.2, Dec. 18, 1998.
Cisco Technology Inc.
Myers Paul R
Trellis IP Law Group, PC
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