Method for improved fabrication of salicide structures

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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Details

C438S689000

Reexamination Certificate

active

06475893

ABSTRACT:

BACKGROUND
The present invention relates generally to semiconductor processing and, more particularly, to improved techniques for fabricating cobalt silicide layers for use in self-aligned (salicide) technology.
In the manufacture of semiconductor devices, salicide (or self-aligned silicide) materials are formed upon gate conductors and diffusion regions to reduce the line resistance of a CMOS device, thereby improving the speed characteristics thereof. In salicide technology, a refractory metal or a near noble metal, such as titanium, is deposited on a silicon substrate. The deposited titanium is then annealed, thereby forming a silicide layer only on the exposed areas of the substrate. The areas of unreacted titanium left on the dielectric may then be selectively etched away without a masking step. Thus, the process is “self-aligning”.
As circuit devices have continued to shrink in size, however, it has been found that titanium silicide (TiSi
2
) becomes an unsatisfactory silicide material since the sheet resistance thereof begins to sharply increase when the linewidth of the device decreases below 0.20 &mgr;m. More recently, cobalt disilicide (CoSi
2
) has been used as a replacement for titanium in salicide structures since it does not suffer from a linewidth dependent sheet resistance problem. On the other hand, the use of cobalt silicide structures is not without its own drawbacks. For example, unlike titanium, a cobalt layer requires a cap layer such as titanium nitride (TiN) due to the sensitivity of cobalt to contaminants during the annealing process. In addition, it has also been found that a silicon substrate must be stripped of any native oxide layer thereupon before cobalt is deposited. Otherwise, the diffusion of silicon and cobalt is impaired, leading to incomplete formation of CoSi and resulting in poor salicide formation. Accordingly, a formative process is now needed to minimize and/or eliminate the aforementioned drawbacks to produce an effective CoSi
2
layer.
BRIEF SUMMARY
The above discussed and other drawbacks and deficiencies of the prior art are overcome or alleviated by a method for preparing a semiconductor material for the formation of a silicide layer on selected areas thereupon. In an exemplary embodiment of the invention, the method includes removing at least one of a nitride and an oxynitride film from the selected areas, removing metallic particles from the selected areas, removing surface particles from the selected areas, removing organics from the selected areas, and removing an oxide layer from the selected areas.
In a preferred embodiment, removing at least one of a nitride and an oxynitride film from the selected areas further comprises treating the selected areas with a hydrogen fluoride (HF)/ ethylene glycol (EG) etch solution. The concentration of the hydrogen fluoride (HF)/ ethylene glycol (EG) etch solution is about 96% ethylene glycol : 4% (49% by volume) HF. In addition, removing metallic particles, surface particles and organics from the selected areas further comprises a S/P HuangAB clean, which includes: treating the selected area with a sulfuric acid (H
2
SO
4
) and hydrogen peroxide (H
2
O
2
) solution, treating the selected area with a hydrogen peroxide (H
2
O
2
) and ammonium hydroxide (NH
4
OH) solution, and treating the selected area with a hydrogen peroxide (H
2
O
2
) and hydrochloric acid (HCl) solution. Removing organics from the selected areas also comprises an ozone plasma clean, which produces an oxide layer of about 5-60 angstroms on the selected areas. Finally, removing the oxide layer from the selected areas comprises treating the selected areas with a dilute hydrofluoric acid (DHF) etch solution.


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