Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1998-11-24
2000-09-12
Tokar, Michael
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 47, H01L 2500, H03K 19177, H03K 19173
Patent
active
061183008
ABSTRACT:
A method for implementing a large multiplexer with FPGA lookup tables. Logic that defines a multiplexer is detected and implemented according to the number of inputs and the target FPGA architecture. In one situation, a large multiplexer is implemented in two stages. The first stage implements wide AND functions of each of the input signals using lookup tables and carry logic. In a second stage, the resulting decoded input signals are combined in a wide OR gate again formed from lookup tables and a carry chain. In another situation, the multiplexer is implemented as a tree structure using lookup tables that implement 2:1 multiplexers in combination with other 2:1 multiplexers provided by configurable logic blocks of the FPGA.
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Mohan Sundararajarao
Wittig Ralph D.
Chang Daniel D.
Maunu LeRoy D.
Tokar Michael
Xilinx , Inc.
Young Edel M.
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