Method for implementing diffusion barrier in 3D memory

Details Method for implementing diffusion barrier in 3D memory Method for implementing diffusion barrier in 3D memory

2007-03-30

2009-12-08

Smith, Bradley K (Department: 2894)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S652000, C438S597000, C438S584000, C257SE21294

Reexamination Certificate

active

07629253

ABSTRACT:
One or more diffusion barriers are formed around one or more conductors in a three dimensional or 3D memory cell. The diffusion barriers allow the conductors to comprise very low resistivity materials, such as copper, that may otherwise out diffuse into surrounding areas, particularly at elevated processing temperatures. Utilizing lower resistivity materials allows device dimension to be reduced by mitigating increases in resistance that occur when the size of the conductors is reduced. As such, more cells can be produced over a given area, thus increasing the density and storage capacity of a resulting memory array.

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