Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2006-08-01
2006-08-01
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S343000
Reexamination Certificate
active
07084040
ABSTRACT:
Formation of a regrowth layer of a Group III–V semiconductor material is facilitated by prior formation of an intermediate layer, selected primarily for its smooth morphology properties. The intermediate layer is formed over an underlying substrate and over a dielectric layer formed over portions of the substrate. The intermediate layer maintains the monocrystalline properties of the underlying substrate in regions other than those covered by the dielectric layer, and improves the electrical and morphology properties of the regrowth layer formed over the intermediate layer.
REFERENCES:
patent: 4225409 (1980-09-01), Minomura
patent: 4296424 (1981-10-01), Shibasaki et al.
patent: 5273930 (1993-12-01), Steele et al.
patent: 5726462 (1998-03-01), Spahn et al.
patent: 2001/0004488 (2001-06-01), Morita
patent: 2003/0156610 (2003-08-01), Kwon
patent: 1 220 333 (2002-07-01), None
Gambin Vincent
Sawdai Donald J.
Northrop Grumman Corp.
Tarolli, Sundheim Covell & Tummino LLP
Vu David
LandOfFree
Method for growth of group III-V semiconductor material on a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for growth of group III-V semiconductor material on a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for growth of group III-V semiconductor material on a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3695143