Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Reexamination Certificate
2000-12-26
2003-06-17
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
C438S046000, C438S483000
Reexamination Certificate
active
06579780
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for growing a compound semiconductor including a group III-V compound semiconductor layer which includes nitrogen and a group V element other than nitrogen as a group V composition; a quantum well structure including a group III-V compound semiconductor layer which includes nitrogen and a group V element other than nitrogen as a group V composition: and a compound semiconductor device including such a quantum) well structure.
2. Description of the Related Art
Recently, as group III-V compound semiconductor materials having a significantly wider field of use, group III-V compound semiconductor materials including a group V element other than nitrogen (arsenic (As), phosphorus (P), and antimony (Sb), etc.) and about several percents of nitrogen as a group V composition have been proposed. Nitrogen and group V elements other than nitrogen are significantly different from each other in atom diameter and electronegativity as described below. Due to such a difference, specific physical properties are generated by mixing nitrogen and a group V element other than nitrogen. The atom diameter is 0.070 nm for nitrogen: whereas it is 0.118 nm for arsenic, 0.110 nm for phosphorus, and 0.136 nm for antimony. The electric negativity is 3.5 for nitrogen; whereas it is 2.4 for arsenic, 2.5 for phosphorus, and 2.1 for antimony. For example, GaInNAs having a nitrogen composition ratio of several percents is considered to be obtained by mixing GaInAs and GaInN which has a larger forbidden band width than GaInAs, the GaInN being mixed at a ratio of several percents. However, GaInNAs having a nitrogen composition ratio of several percents has very large bowing on the change of the forbidden band width accompanying the mixing. Accordingly, such GaInNAs has the forbidden band width rapidly narrowed by the mixing although GaInN has a large forbidden band width.
The other physical properties of GaInNAs-based materials, such as refractive index, exhibit a specific behavior of significantly changing when a small amount of nitrogen is mixed. GaInNAS-based materials thus obtained have been found to be the only materials which can be used in a light emitting layer of a light emitting device which emits light having a wavelength of 1.3 &mgr;m or 1.55 &mgr;m (both of which are important for optical fiber communication) or a longer wavelength while being lattice-matched to a GaAs substrate, which is of high quality at low-cost. Accordingly, GaInNAs-based materials have recently become the target of attention industrially as materials to be used for a light emitting device.
By combining a group III-V compound semiconductor material, such as GaInNAs, including nitrogen and a group V element other than nitrogen with another group III-V compound semiconductor material having approximately the same lattice constant (for example, GaAs, AlGaAs, or InGaAsP), a hetero-junction having a very large band discontinuity (&Dgr;E
o
) in the valence band can be formed. Therefore, it is predicted that a light emitting device including a light emitting layer formed of GaInNAs efficiently confines electrons injected into the light emitting layer even at a high temperature, and thus has a sufficiently small change in light emitting characteristics depending on temperature.
The hetero-junction is formed by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The hetero-junction can also be formed by gas source molecular beam epitaxy (GS-MBE), metal organic molecular beam epitaxy (MO-MBE), chemical molecular beam epitaxy (CBE) or the like.
FIG. 11A
shows a quantum well structure
1100
including an AlGaAs lower barrier layer
1101
, a GaInNAs well layer
1102
, and an AlGaAs upper barrier layer
1103
as a conventional example of a hetero-junction of compound semiconductors (conventional example 1).
FIG. 11B
shows supply sequences of sources for producing the quantum well structure
1100
. In the example shown in
FIG. 11B
, the compound semiconductor layers are grown by MOCVD, using trimethyl gallium (TMGa), trimethylaluminum (TMAl), trimethyl indium (TMIn), arsine (AsH
3
), and dimethylhydrazine (DMeHy) as sources of Ga, Al, In, As and N, respectively. As a carrier gas, hydrogen (H
2
) is used. In
FIG. 11
, parts (a) through (e) show the supply sequences of the respective sources.
The AlGaAs lower barrier layer
1101
is grown in step M. Then, in step N, only AsH
3
is supplied to suppress the vaporization of As, thereby pausing the growth. In this specification, a process of pausing growth will be referred to as a “growth pause”. In step O, the GaInNAs well layer
1102
is grown. Then, in step P, only AsH
3
is supplied, thereby performing a growth pause. In step Q, the AlGaAs upper barrier layer
1103
is grown. During the growth pause in steps N and P, an optimum supply amount of AsH
3
for each of the lower barrier layer
1101
, the well layer
1102
, and the upper barrier layer
1103
is set. H
2
as the carrier gas is supplied at a constant amount throughout the steps M through Q.
Japanese Laid-Open Publication No. 10-144611 (conventional example 2) discloses a supply sequence for suppressing the generation of a metamorphic layer at a hetero-interface of a hetero-junction of layers of different group V compositions.
FIG. 12A
shows an FET crystal
1200
in conventional example 2 (shown in Japanese Laid-Open Publication No. 10-144611, FIG.
1
). The FET crystal
1200
includes a GAs buffer layer
1212
, an AlGaAs buffer layer
1213
, a GaAs buffer layer
1214
, an undoped Ga
0.8
In
0.2
As channel layer
1215
, an n-type Ga
0.5
In
0.5
P electron supply layer
1216
, an n-type Al
0.2
Ga
0.8
As Schottky layer
1217
, and an n-type GaAs cap layer
1218
which are sequentially laminated on a semi-insulating GaAs substrate
1211
in this order.
The FET crystal
1200
is an example of hetero-junction of As-based materials including As as the only group V element (i.e., the undoped Ga
0.8
In
0.2
As channel layer
1215
and n-type Al
0.2
Ga
0.8
As Schottky layer
1217
) and a P-based material including P as the only group V element (i.e., the n-type Ga
0.5
In
0.5
P electron supply layer
1216
).
FIG. 12B
shows supply sequences of sources for forming the undoped Ga
0.8
In
0.2
As channel layer
1215
, the n-type Ga
0.5
In
0.5
P electron supply laster
1216
, and the n-type Al
0.2
Ga
0.8
As Schottky layer
1217
. In the example shown in
FIG. 12B
, PH
3
is used as a P source and AsH
3
is used as an As source. In
FIG. 12B
, parts (a) through (c) shows the supply sequences of a group III element, PH
3
and AsH
3
, respectively.
In step R, the As-based material (undoped Ga
0.8
In
0.2
As channel layer
1215
) is grown. Then, in steps S through U, a growth pause is performed. In step V, the P-based material (n-type Ga
0.5
In
0.5
P electron supply layer
1216
) is grown. Then, in steps W through Y, a growth pause is performed. In step Z, the As-based material (n-type Al
0.2
Ga
0.8
As Schottky layer
1217
) is grown.
In the above-described supply sequences, the two growth pause processes each include three steps, i.e., the step of supplying only the group V element used for growing the layer in the immediately previous step (steps S and W), the step of supplying no material (steps T and X), and the step of supplying only the group V element used for growing the layer in the immediately following step (steps U and Y).
Japanese Laid-Open Publication No. 10-270798 (conventional example 3) discloses a technology aiming at suppressing the formation of a metamorphic layer at a hetero-interface of a hetero-junction of an AlGaAs layer and a GaInNAs layer.
FIG. 13
shows a semiconductor light emitting device
1300
in the conventional example 3 (shown in Japanese Laid-Open Publication No. 10-270798; FIG.
2
). The semiconductor light emitting device
1300
includes an n-type GaAs buffer
1302
, an n-type AlGaAs cladding layer
1303
, an AlGaAs guide layer
1304
, a GaAs spaces layer
1305
, a GaInNAs well layer
1306
, a
Mulpuri Savitri
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
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