Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-03-10
2000-08-29
Sheikh, Ayaz R.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 25, 714 28, 714 30, 714738, 714741, 700 79, 700 81, 703 13, 703 14, 703 15, 703 16, 703 21, 703 22, 717 1, 717 2, 717 4, 717 9, 717 10, 717 11, G06F 1100
Patent
active
061123129
ABSTRACT:
A method is presented for generating functional tests for a microprocessor having several operating modes and features. A test module template file includes a basic set of instructions required to configure the microprocessor to operate in any one of the several operating modes and with any of the several features enabled. A user modifies a copy of the test module template file to form a test module file which provides a desired operating environment and causes the microprocessor to perform a desired activity and to produce a test result. An assembler takes as input the test module file, along with the contents of any library files to be included, and produces both an assembly code list file and a test code file. The assembly code list file is a computer program listing containing assembly language instructions and data. The test code file is intended for execution by: (i) a model of the microprocessor existing within a simulation system, or (ii) a hardware implementation of the microprocessor residing within a computer system. The user specifies at execution time the operating mode of the microprocessor and any features to be enabled via a command line. An expected test result of the desired activity is derived from a functional specification of the microprocessor. The test result is compared to the expected test result in order to determine proper operation of the microprocessor.
REFERENCES:
patent: 4231087 (1980-10-01), Hunsberger et al.
patent: 4455654 (1984-06-01), Bhaskar et al.
patent: 4998250 (1991-03-01), Kohlmeier et al.
patent: 5263149 (1993-11-01), Winlow
patent: 5321828 (1994-06-01), Phillips et al.
patent: 5345583 (1994-09-01), Davis
patent: 5465216 (1995-11-01), Rotem et al.
patent: 5699506 (1997-12-01), Phillips et al.
patent: 5740183 (1998-04-01), Lowe
patent: 5742502 (1998-04-01), Cherichetti et al.
patent: 5781721 (1998-07-01), Hayes et al.
patent: 5812561 (1998-09-01), Giles et al.
patent: 5867644 (1999-02-01), Ransom et al.
patent: 5940783 (1999-08-01), Kukutsu et al.
patent: 5943498 (1999-08-01), Yano et al.
patent: 5954824 (1999-09-01), Cherichetti et al.
patent: 5956477 (1999-09-01), Ramson et al.
patent: 5958037 (1999-09-01), Dreyer et al.
Parker Allan
Skrovan Joseph C.
Advanced Micro Devices , Inc.
Backer Firmin
Daffer Kevin L.
Sheikh Ayaz R.
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