method for generating a set of test patterns for an optical...

Details method for generating a set of test patterns for an optical... method for generating a set of test patterns for an optical...

2008-07-22

2008-07-22

Whitmore, Stacy A (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10710648

ABSTRACT:
A method of synthesizing layout patterns to test an optical proximity correction algorithm. The method comprises the steps of: embodying Walsh patterns in a set of Walsh pattern matrices; processing groups of matrices from the set of Walsh pattern matrices to form a set of test matrices; mapping the set of test matrices to a test pattern set.

REFERENCES:
patent: 6952818 (2005-10-01), Ikeuchi
Radecka, K., et al., “Design verification by test vectors and arithmetic transfrom universal test set”, May 2004, IEEE transactiosn on computers, vol. 53, No. 5., pp. 628-640.

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