Method for generating a command file of a group of DRC rules...

Details Method for generating a command file of a group of DRC rules... Method for generating a command file of a group of DRC rules...

2006-08-22

2006-08-22

Lin, Sun James (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07096441

ABSTRACT:
A method is capable of generating a command file of a group of design rule check (DRC) rules or layout versus schematic (LVS) rules and layout parasitic extraction (LPE) rules that can be used by a layout verification tool to verify the layout and the parasitic characteristics of an integrated circuit. The method comprises choosing whether to generate a command file of DRC rules or a command file of LVS/LPE rules, selecting a process from a group of processes, setting a set of parameters, and extracting program codes from a plurality of modules according to the selected process and the set of parameters so as to generate a command file of DRC rules or LVS/LPE rules.

REFERENCES:
patent: 5754826 (1998-05-01), Gamal et al.
patent: 2002/0138813 (2002-09-01), Teh et al.
patent: 2004/0107175 (2004-06-01), Hung et al.
patent: 2004/0107197 (2004-06-01), Shen et al.
patent: 2005/0086619 (2005-04-01), Teh et al.

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