Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
1999-04-26
2002-07-23
Lee, Thomas (Department: 2182)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C327S291000, C713S400000
Reexamination Certificate
active
06425089
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 88104318, filed Mar. 19, 1999, the full disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to computer technology, and more particularly, to a method for generating a clock signal for a UART (Universal Asynchronous Receiver-Transmitter) unit mounted on a PCI-compliant (Peripheral Component Interconnection) interface card.
2. Description of Related Art
A UART unit is a circuit module, typically incorporated in a single integrated circuit cuit chip, that includes both the receiving and transmitting circuits required for asynchronous nous serial communication between computer systems. It is typically incorporated in a modem and designed in accordance with established standards. Due to its asynchronous nature, a local clock generator is required to generate a clock signal for the timing of the transmitted and received signals. The clock generator can be internal or external to the UART unit. Some conventional types of UART units use an external crystal oscillator to generate a standardized 1.8432 MHz clock signal for the UART unit.
One drawback to the foregoing scheme, however, is that the use of the external crystal oscillator would considerably increase the manufacture cost since an additional input interface is required. By incorporating the clock generator inside the UART unit, it would also increase manufacture cost since it requires an increased layout area for the IC chip of the UART unit.
A conventional method that can generate a clock signal for UART unit having an ISA (Industry Standard Architecture) bus is to use the standardized 14.31818 MHz clock signal from the ISA bus in such a manner as to first multiply it by 4 and subsequently divide the resulted frequency by 31 to obtain an output frequency of 1.8475 MHz which is approximately close to the standardized 1.8432 MHz frequency to serve as the clock signal for the UART unit.
One drawback to the foregoing method, however, is that the resulted frequency is still quite large in deviation from the desired 1.8432 MHz. Moreover, it requires a frequency divider and a frequency multiplier to implement, which causes the implementation cost to be high. The implementation cost is even higher when a frequency multiplier with internal delay circuitry.
In conclusion, the prior art has two drawbacks. First, it requires the use of an external crystal oscillator to implement, which would increase manufacture cost. Second, in the case of using the standardized 14.31818 MHz clock signal from an ISA bus, it requires the use of a frequency multiplier, which would also increase manufacture cost and result in large frequency deviations.
SUMMARY OF THE INVENTION
This invention provides a method for generating a clock signal for a UART unit mounted on a PCI-compliant interface card, which can be implemented without using an external crystal oscillator, so that the manufacture cost of the UART unit can be reduced as compared to the prior art.
This invention provides a method for generating a clock signal for a UART unit mounted on a PCI-compliant interface card, which can utilize one of the PCI clock signals from the PCI local bus to generate a near-1.8432 MHz frequency with a smaller deviation from the standardized 1.8432 MHz to serve as the local clock signal for the UART unit.
In accordance with the foregoing and other objectives of this invention, the invention provides a method for generating a clock signal for a UART unit mounted on a PCI-compliant interface card. The PCI-compliant interface card is coupled to a PCI local bus, which supplys a PCI-standardized clock signal with a standardized frequency. In the method, a PCI-standardized clock signal is divided by an integer frequency divisor. The divided PCI-standardized clock signal is multiplied by an integer frequency multiplier. The divided PCI-standardized clock signal is changed to UART-demanded clock signal with a resulted frequency, which is substantially equal to a frequency which can be used for operation of the UART unit. The method of the invention can be implemented without having to use an external crystal oscillator or a frequency multiplier as in the case of the prior art. Moreover, the method of the invention can help result in a clock signal with a smaller frequency deviation from the standardized 1.8432 MHz than the prior art. The invention is therefore more advantageous to use than the prior art.
The method of the invention includes at first the PCI clock signal is divided by a predetermined integer frequency divisor. The resulted frequency from the division multiplied by a predetermined integer frequency multiplier that allows the resulted frequency to be substantially close to 1.8432 MHz to serve as the intended clock signal to the UART unit. Preferably, the integer frequency multiplier is in the range equal to or greater than 8. In one preferred embodiment, the integer frequency multiplier is 8 and the integer frequency divisor is 143 to render the 33 MHz PCI clock signal into a near-1.8432 MHz clock signal. In another preferred embodiment, the integer frequency multiplier is 32 and the integer frequency divisor is 573. The method of the invention can be implemented without having to use an external crystal oscillator or a frequency multiplier as in the case of the prior art. Moreover, the method of the invention can help result in a clock signal with a smaller frequency deviation from the standardized 1.8432 MHz than the prior art. The invention is therefore more advantageous to use than the prior art.
REFERENCES:
patent: 4204207 (1980-05-01), Bakula et al.
patent: 4377843 (1983-03-01), Garringer et al.
patent: 5241647 (1993-08-01), Lin et al.
patent: 5588145 (1996-12-01), Wishneusky
patent: 6298370 (2001-10-01), Tang et al.
J.C. Patents
Lee Thomas
Park Ilwoo
Winbond Electronics Corp.
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