Method for front end of line fabrication

Etching a substrate: processes – Gas phase etching of substrate

Reexamination Certificate

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Details

C438S715000, C438S692000, C438S732000

Reexamination Certificate

active

07396480

ABSTRACT:
A method for removing native oxides from a substrate surface is provided. In at least one embodiment, the method includes supporting the substrate surface in a vacuum chamber and generating reactive species from a gas mixture within the chamber. The substrate surface is then cooled within the chamber and the reactive species are directed to the cooled substrate surface to react with the native oxides thereon and form a film on the substrate surface. The substrate surface is then heated within the chamber to vaporize the film.

REFERENCES:
patent: 4951601 (1990-08-01), Maydan et al.
patent: 5000113 (1991-03-01), Wang et al.
patent: 5030319 (1991-07-01), Nishino et al.
patent: 5186718 (1993-02-01), Tepman et al.
patent: 5328558 (1994-07-01), Kawamura
patent: 5500249 (1996-03-01), Telford et al.
patent: 5812403 (1998-09-01), Fong et al.
patent: 5855681 (1999-01-01), Maydan et al.
patent: 5856240 (1999-01-01), Sinha et al.
patent: 5951776 (1999-09-01), Selyutin et al.
patent: 6086677 (2000-07-01), Umotoy et al.
patent: 6241845 (2001-06-01), Gadgil et al.
patent: 6350320 (2002-02-01), Sherstinsky et al.
patent: 6364954 (2002-04-01), Umotoy et al.
patent: 6372657 (2002-04-01), Hineman et al.
patent: 2003/0072639 (2003-04-01), White et al.
patent: 2003/0079686 (2003-05-01), Chen et al.
patent: 2004/0005726 (2004-01-01), Huang
patent: 2004/0182315 (2004-09-01), Laflamme, Jr. et al.
patent: 1 107 288 (2001-06-01), None
patent: WO 2004/006303 (2004-01-01), None
patent: WO 2004/074932 (2004-09-01), None
Wang et al. (Ultra High-selectivity silicon nitride etch process using an inductively coupled plasma source; J. Vac. Sci. Technol. A 16(3), May/Jun. 1998; 0734-2101/98/16(3)/1582/6/$15).
Hashim et al. (Charicterization of thin oxide removal by RTA Treatment; ICSE 1998 Proc. Nov. 1998, Rangi, Malaysia); 0-7803-4971-7.98/$10.00).
Wolf et al. (Silicon Processing for the VLSI Era; vol. 1; 1986; Lattice Press).
European Search Report dated May 23, 2006 for EP Application No. 05251143.3.
European Search Report dated Sep. 1, 2006 for EP Application No. 05251143.3.
S.M. Sze, VLSI Technology, McGraw-Hill Book Company, 3 pages.
Ogawa, Hiroki, et al.,Dry Cleaning Technology for Removal of Silicon Native Oxide Employing Hot NH3/NF3Exposure, Jpn. J. Appl. Phys. vol. 41 (2002) pp. 5349-5358, Part 1, No. 8, Aug. 2002.

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