Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-02-28
1999-02-23
Bowers, Charles
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438666, 438669, 438672, 438700, H01L 2348
Patent
active
058743561
ABSTRACT:
The present invention discloses a method for forming a zig-zag bordered opening in a semiconductor structure such that the film stress in a barrier/glue layer of TiN can be significantly reduced to eliminate the occurrence of volcano defect in which delamination or peeling-off of the TiN layer from the contact opening occurs. The method can be easily carried out by providing a mask that has a desirable zig-zag pattern during a photomasking step performed on the semiconductor device.
REFERENCES:
patent: 3890698 (1975-06-01), Clark
patent: 5194402 (1993-03-01), Ehrfeld et al.
patent: 5480820 (1996-01-01), Roth et al.
patent: 5583380 (1996-12-01), Larsen et al.
S. Wolf, "Silicon Processing for the VLSI Era" vol. II, pp. 103-107, 247-251, Jun. 1990.
Chang W. R.
Chao Y. C.
Chen C. H.
Tsui Y. M.
Bowers Charles
Taiwan Semiconductor Manufacturing Co. Ltd.
Whipple Matthew
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