Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-06-05
2004-08-17
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S675000, C257S775000
Reexamination Certificate
active
06777332
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to methods for forming wiring structures in electronic devices such as semiconductor devices.
Examples of known methods for forming wiring structures include a prior art (see, for example, Japanese Laid-Open Publication No. 11-186261) in which heat treatment (hereinafter, referred to as annealing) is performed after a chemical mechanical polishing (CMP) process. Hereinafter, the prior art method for forming a wiring structure will be described with reference to the drawings with the case where wire is formed in a wiring groove formed in an insulating film taken an example.
FIGS. 13A through 13E
are cross-sectional views showing respective process steps of a method for forming a wiring structure according to the prior art.
First, as shown in
FIG. 13A
, an underlying oxide film
12
is deposited by a plasma CVD (chemical vapor deposition) process over a silicon substrate
11
, and then a SiN film
13
and a SiO
2
film
14
are deposited in this order with similar processes. Subsequently, the SiO
2
film
14
is etched using a resist pattern (not shown) as a mask, thereby forming a recess reaching the SiN film
13
. Thereafter, the resist pattern and the exposed part of the SiN film
13
are removed, thereby forming a wiring groove
15
.
Next, as shown in
FIG. 13B
, a barrier metal TaN film
16
is deposited by a sputtering process over the SiO
2
film
14
provided with the wiring groove
15
, and then a Cu seed film
17
is deposited over the barrier metal TaN film
16
.
Thereafter, as shown in
FIG. 13C
, a Cu plating layer
18
is deposited by an electrolytic plating process over the SiO
2
film
14
to fill the wiring groove
15
completely.
Subsequently, as shown in
FIG. 13D
, respective parts of the Cu plating layer
18
, Cu seed film
17
and barrier metal TaN film
16
located outside the wiring groove
15
are removed by a CMP process, thereby exposing the surface of the SiO
2
film
14
. In this manner, a Cu buried wiring layer
19
is formed in the wiring groove
15
.
Then, an annealing process is performed at a temperature of 300 to 500° C. for a holding time of 5 to 2000 seconds, thereby eliminating, for example, moisture, hydrogen and carbon dioxide contained in the Cu buried wiring layer
19
as well as increasing the grain size of the Cu buried wiring layer
19
, as shown in FIG.
13
E.
Through the foregoing process steps, a copper wire for a semiconductor device is formed.
However, the prior art has a problem described later.
FIG. 14
is a view for explaining the problem in the prior art.
As shown in
FIG. 14
, a SiN film
43
, a SiO
2
film
44
and a FSG film (fluorine-doped silicon oxide film)
45
are formed in this order over an insulating film
41
in which a lower wiring layer
42
is buried. The SiN film
43
, the SiO
2
film
44
and the FSG film
45
are provided with a recess
46
and a wiring groove
47
. More specifically, the recess
46
is made up of: a via hole
46
a
formed through the SiN film
43
and the SiO
2
film
44
to reach the lower wiring layer
42
; and a wiring groove
46
b
formed in the FSG film
45
and connected to the via hole
46
a
. The wiring groove
47
is also formed in the FSG film
45
in the same manner as the wiring groove
46
b
. The recess
46
and the wiring groove
47
are filled with a copper film (a conducive film for upper wiring)
49
that is surrounded by a barrier film
48
. A SiN film
50
is formed on the FSG film
45
and the copper film
49
.
In the prior art, however, if the copper film
49
is annealed after a CMP process (see
FIG. 13D
) in a process for forming wiring, there arises a problem that surface defects such as a surface fracture
51
and a crack
52
are created in the surface of the copper film
49
buried in, for example, the recess
46
, as shown in FIG.
14
.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method for preventing the occurrence of surface defects in a conductive film for wiring and thus fabricating an electronic device such as a semiconductor device with a highly-reliable wiring structure with a good yield.
In order to achieve this object, the present inventor has studied causes of the surface fracture
51
and the crack
52
occurring in the prior art in which “annealing” is performed “after a CMP process” to obtain the following findings. That is to say, in the prior art, the copper film
49
buried in, for example, the recess
46
is annealed so that the crystallization of the copper film
49
is completed. Accordingly, defects (e.g., vacancies at the atomic level existing along a grain boundary) contained in the copper film
49
gather in the surface of the copper film
49
, which has been already planarized, and in addition, the copper film
49
shrinks unevenly. As a result, the surface fracture
51
and the crack
52
occur as shown in FIG.
14
. Although the SiN film
50
is deposited over the entire surface of the wiring structure including the copper film
49
after the formation of the structure in the prior art, the surface fracture
51
and the crack
52
are not filled with the SiN film
50
because the SiN film
50
has a low step coverage. Therefore, the surface defects such as the surface fracture
51
created in the surface of the copper film
49
to serve as wiring are left without being treated. As a result, these surface defects act as paths for surface diffusion of copper atoms, thus greatly deteriorating resistance to electromigration.
In view of this, the present inventor has come up with a method for forming a highly-reliable wiring structure by performing “CMP processes” separately “before and after an annealing process” in order to simultaneously remove the surface defects created in a conductive film for wiring during the annealing process and a surface portion of the conductive film for wiring.
Specifically, an inventive method for forming a wiring structure includes the steps of: forming a recess in an insulating film; depositing a conductive film over the insulating film such that the recess is filled with the conductive film; performing a heat treatment on the conductive film; partly removing the conductive film before the step of performing the heat treatment is performed; and partly removing the conductive film after the step of performing the heat treatment has been performed.
With the inventive method for forming a wiring structure, after a conductive film has been deposited to fill a recess provided in an insulating film, the conductive film is subjected to a heat treatment, and then the conductive film is partly removed before and after the heat treatment. That is to say, the conductive film is partly removed before a heat treatment and the remaining conductive film is subjected to the heat treatment, thereby retaining the hardness of the conductive film such that the conductive film is removed relatively evenly in a removing step after the heat treatment. In addition, the conductive film is also partially removed after the heat treatment, thereby simultaneously eliminating defects such as a surface fracture or crack created in the conduction film during the heat treatment. Accordingly, no path for surface diffusion of atoms constituting the conductive film is created, thus preventing deterioration of the electromigration resistance of the wiring structure. As a result, an electronic device such as a semiconductor device with a highly-reliable wiring structure can be fabricated with a good yield.
In the inventive method for forming a wiring structure, the step of removing the conductive film partly (e.g., a CMP process) performed after the heat treatment allows surface defects such as a fracture created in the conductive film to be removed at a time. In other words, it is possible to remove the surface defects without specially setting conditions for the heat treatment, thus forming a highly-reliable wiring structure without increasing the number of process steps.
The inventive method for forming a wiring structure may include the s
Everhart Caridad
Lee Calvin
LandOfFree
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