Method for forming wiring of semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S637000

Reexamination Certificate

active

07485568

ABSTRACT:
According to the present invention, a connection hole is formed above a substrate by an etching treatment using a first resist film as a mask, and after the first resist film is removed by stripping, the substrate is exposed to a water vapor atmosphere. Thus, an amine component in the film is removed before formation of a second resist film for forming a wiring groove, thereby preventing contamination of the second resist film. The present invention is a method for forming wiring of a semiconductor device using a dual damascene method, in which the resist film for forming the wiring groove can be prevented from being contaminated with the amine component or the like.

REFERENCES:
patent: 2001/0041462 (2001-11-01), Kashiwagi et al.
patent: 2003/0091728 (2003-05-01), Ueda
patent: 2003/0170993 (2003-09-01), Nagahara et al.
patent: 2003/0186537 (2003-10-01), Yamanaka et al.
patent: 2004/0087139 (2004-05-01), Yeh et al.
patent: 2004/0132291 (2004-07-01), Lee et al.
patent: 2006/0042651 (2006-03-01), Verhaverbeke et al.
patent: 2006/0094219 (2006-05-01), Soda
patent: 2006/0094234 (2006-05-01), Soda et al.
patent: 2007/0026683 (2007-02-01), Chen et al.
patent: 2002-083869 (2002-03-01), None

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