Method for forming via hole

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438637, H01L 214763

Patent

active

061366943

ABSTRACT:
A method for forming a via hole provides a substrate, and a conducting layer is formed on the substrate. An intermetal dielectric layer is deposited conformal to the substrate, and a patterned photoresist is formed on the intermetal dielectric layer. The photoresist is used as a mask, and a portion of intermetal dielectric layer, which is not covered by the photoresist, is removed to expose the conducting layer, so that an opening is formed. A polymer layer is unavoidably formed on the surface of the opening, and then the photoresist and the polymer layer are removed. The residual polymer layer is removed by wet bench to form a via hole.

REFERENCES:
patent: 5374503 (1994-12-01), Sachdev
patent: 5928207 (1999-07-01), Pisano et al.
patent: 5970376 (1999-10-01), Chen

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